<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:itunes="http://www.itunes.com/dtds/podcast-1.0.dtd"
	xmlns:media="http://search.yahoo.com/mrss/"
	>
<channel>
	<title>Comments on: EEVblog #44 &#8211; Part 2 &#8211; Logic Analyzer Tutorial</title>
	<atom:link href="http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/feed/" rel="self" type="application/rss+xml" />
	<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/</link>
	<description>NO SCRIPT, NO FEAR, ALL OPINION - An off-the-cuff Video Blog for Electronics Engineers, Hobbyists, Hackers and Makers</description>
	<lastBuildDate>Tue, 07 Sep 2010 09:57:39 +0000</lastBuildDate>
	<sy:updatePeriod>hourly</sy:updatePeriod>
	<sy:updateFrequency>1</sy:updateFrequency>
	<generator>http://wordpress.org/?v=3.0.1</generator>
	<item>
		<title>By: Jim</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3668</link>
		<dc:creator>Jim</dc:creator>
		<pubDate>Sat, 21 Nov 2009 03:24:35 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3668</guid>
		<description>Macka,

I&#039;ve also heard that stainless steel is much stronger than most bananas, so which is better [to eat]?</description>
		<content:encoded><![CDATA[<p>Macka,</p>
<p>I&#8217;ve also heard that stainless steel is much stronger than most bananas, so which is better [to eat]?</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Scott Burris</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3666</link>
		<dc:creator>Scott Burris</dc:creator>
		<pubDate>Sat, 21 Nov 2009 01:37:52 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3666</guid>
		<description>Looks like I&#039;m going to make another purchase then -- darn you EEVBLOG, I keep finding ways to spend money!

I picked up the Rigol DS1502E from Hong Kong for $400US since Dave seemed to like his so much, and I&#039;ve been quite happy with it.

Maybe Santa will bring me the Intronix Logicport for Christmas.  I should go look at the unit Dave is waving about in his blog and compare specs.

Scott</description>
		<content:encoded><![CDATA[<p>Looks like I&#8217;m going to make another purchase then &#8212; darn you EEVBLOG, I keep finding ways to spend money!</p>
<p>I picked up the Rigol DS1502E from Hong Kong for $400US since Dave seemed to like his so much, and I&#8217;ve been quite happy with it.</p>
<p>Maybe Santa will bring me the Intronix Logicport for Christmas.  I should go look at the unit Dave is waving about in his blog and compare specs.</p>
<p>Scott</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Macka</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3650</link>
		<dc:creator>Macka</dc:creator>
		<pubDate>Fri, 20 Nov 2009 11:11:23 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3650</guid>
		<description>Is this the sort of thing you would use to debug/reverse engineer a CPU?

I know a team of people reverse engineered the Nintendo Wii CPU&#039;s with FPGA&#039;s.

As far as I understand an FPGA is much faster then most logic analysers, so which is better [for logic analysis]?</description>
		<content:encoded><![CDATA[<p>Is this the sort of thing you would use to debug/reverse engineer a CPU?</p>
<p>I know a team of people reverse engineered the Nintendo Wii CPU&#8217;s with FPGA&#8217;s.</p>
<p>As far as I understand an FPGA is much faster then most logic analysers, so which is better [for logic analysis]?</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Mario</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3646</link>
		<dc:creator>Mario</dc:creator>
		<pubDate>Fri, 20 Nov 2009 03:40:23 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3646</guid>
		<description>Dave,

You neglected to mention two of the most important points about LA&#039;s:

1/.  Flexible trigger options and programming thereof.

2/.  The software used to analyze the resulting data.  

I think, after years of working with LA&#039;s and relying upon them, these two issues are forgotten about, but are probably the most important - especially when using the things!

Love the vlog!

Mario.</description>
		<content:encoded><![CDATA[<p>Dave,</p>
<p>You neglected to mention two of the most important points about LA&#8217;s:</p>
<p>1/.  Flexible trigger options and programming thereof.</p>
<p>2/.  The software used to analyze the resulting data.  </p>
<p>I think, after years of working with LA&#8217;s and relying upon them, these two issues are forgotten about, but are probably the most important &#8211; especially when using the things!</p>
<p>Love the vlog!</p>
<p>Mario.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: BoBoo</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3645</link>
		<dc:creator>BoBoo</dc:creator>
		<pubDate>Fri, 20 Nov 2009 02:12:34 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3645</guid>
		<description>well , your getting there, but not much of a tutorial, just a slurp from the tea cup, but better than the co co pop caps one</description>
		<content:encoded><![CDATA[<p>well , your getting there, but not much of a tutorial, just a slurp from the tea cup, but better than the co co pop caps one</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Fernando Casar</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3622</link>
		<dc:creator>Fernando Casar</dc:creator>
		<pubDate>Wed, 18 Nov 2009 14:27:56 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3622</guid>
		<description>If you are debugging low speed circuits, you could make a parallel port logic analyzer.
Once I needed to &quot;sniff&quot; an i2c communication on a project and I was in a hurry, so I couldn&#039;t get a real analyzer. I googled around and found this:
http://www.xs4all.nl/~jwasys/old/diy2.html
it worked for my purpose, I know it&#039;s not near to a real professional analyzer, but in certain circumstances can still be useful.

pd: By the way I was supposed to use an HP1651B at work in that time, but nobody had used it in a lot of time and they had lost the system diskette.
I was forced to find a quick and cheap solution.</description>
		<content:encoded><![CDATA[<p>If you are debugging low speed circuits, you could make a parallel port logic analyzer.<br />
Once I needed to &#8220;sniff&#8221; an i2c communication on a project and I was in a hurry, so I couldn&#8217;t get a real analyzer. I googled around and found this:<br />
<a href="http://www.xs4all.nl/~jwasys/old/diy2.html" rel="nofollow">http://www.xs4all.nl/~jwasys/old/diy2.html</a><br />
it worked for my purpose, I know it&#8217;s not near to a real professional analyzer, but in certain circumstances can still be useful.</p>
<p>pd: By the way I was supposed to use an HP1651B at work in that time, but nobody had used it in a lot of time and they had lost the system diskette.<br />
I was forced to find a quick and cheap solution.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Gerhard Hoessle</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3613</link>
		<dc:creator>Gerhard Hoessle</dc:creator>
		<pubDate>Wed, 18 Nov 2009 03:52:31 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3613</guid>
		<description>Scott,

I also have the Intronix Logicport. I&#039;ve been using to analyze DDR and SDR SDRAM interfaces running at 100MHz+, along with other FPGA development projects. I&#039;ve found it to work very well, especially its trigger capabilities. 

As far as &quot;leads loading the circuit&quot;, any analyzer (even the most expensive Agilent unit) will effect your circuit because all of them have finite input impedance. So the question becomes how much of an effect, and can your circuit tolerate it. I chose the Logicport partly because it has the lowest input capacitance of any PC-based analyzer I&#039;ve found in its speed/price range. That&#039;s a critical spec for high-speed work. As Dave&#039;s tutorial pointed out, its adjustable input threshold and relatively short leads are also helpful when sampling high-speed signals. 

Gerhard</description>
		<content:encoded><![CDATA[<p>Scott,</p>
<p>I also have the Intronix Logicport. I&#8217;ve been using to analyze DDR and SDR SDRAM interfaces running at 100MHz+, along with other FPGA development projects. I&#8217;ve found it to work very well, especially its trigger capabilities. </p>
<p>As far as &#8220;leads loading the circuit&#8221;, any analyzer (even the most expensive Agilent unit) will effect your circuit because all of them have finite input impedance. So the question becomes how much of an effect, and can your circuit tolerate it. I chose the Logicport partly because it has the lowest input capacitance of any PC-based analyzer I&#8217;ve found in its speed/price range. That&#8217;s a critical spec for high-speed work. As Dave&#8217;s tutorial pointed out, its adjustable input threshold and relatively short leads are also helpful when sampling high-speed signals. </p>
<p>Gerhard</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: bmwm3edward</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3606</link>
		<dc:creator>bmwm3edward</dc:creator>
		<pubDate>Tue, 17 Nov 2009 22:59:38 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3606</guid>
		<description>Great blog, Dave.  I learned more in the 20 minutes about these than I would in many hours of my own research, not to mention averting a misinformed buying decision.</description>
		<content:encoded><![CDATA[<p>Great blog, Dave.  I learned more in the 20 minutes about these than I would in many hours of my own research, not to mention averting a misinformed buying decision.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Kathy Quinlan</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3589</link>
		<dc:creator>Kathy Quinlan</dc:creator>
		<pubDate>Tue, 17 Nov 2009 06:34:01 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3589</guid>
		<description>Hi Scott,

I have not used my LA on high speed circuits yet, I only use it to debug AVR&#039;s.

Luckily I am not needing the power of the new ram chips with the uber tight timing, I cn still get away with ancient slow ram ;)

Regards,

Kat.</description>
		<content:encoded><![CDATA[<p>Hi Scott,</p>
<p>I have not used my LA on high speed circuits yet, I only use it to debug AVR&#8217;s.</p>
<p>Luckily I am not needing the power of the new ram chips with the uber tight timing, I cn still get away with ancient slow ram <img src='http://www.eevblog.com/wp-includes/images/smilies/icon_wink.gif' alt=';)' class='wp-smiley' /> </p>
<p>Regards,</p>
<p>Kat.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Scott Burris</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3588</link>
		<dc:creator>Scott Burris</dc:creator>
		<pubDate>Tue, 17 Nov 2009 05:09:03 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3588</guid>
		<description>Kat,

Have you used your LA on high speed circuits, say SDRAM memory with success?  I&#039;ve got a Tektronix 1240 LA, but it&#039;s too slow (100Mhz) for such things.  

I&#039;m interested in higher speed USB LAs, but I&#039;m concerned that the leads may load down high speed buses too much.

Scott</description>
		<content:encoded><![CDATA[<p>Kat,</p>
<p>Have you used your LA on high speed circuits, say SDRAM memory with success?  I&#8217;ve got a Tektronix 1240 LA, but it&#8217;s too slow (100Mhz) for such things.  </p>
<p>I&#8217;m interested in higher speed USB LAs, but I&#8217;m concerned that the leads may load down high speed buses too much.</p>
<p>Scott</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Brian Hoskins</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3580</link>
		<dc:creator>Brian Hoskins</dc:creator>
		<pubDate>Mon, 16 Nov 2009 19:39:21 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3580</guid>
		<description>I found it hard to believe that they could be actual crickets, especially as they periodically seemed to shut up, so I started wondering if perhaps the capstan motor was in trouble!
But I&#039;m guessing your new camera uses solid state storage anyway, so I&#039;m probably wrong there.  Damn loud those crickets!!!

It&#039;s funny you should do a blog on Logic Analysers because just yesterday I was shopping around for one on the internet.  I have quite a nice storage scope for most of my needs but it&#039;s quite useful to have a logic analyser kicking around every now and then.  Especially if you&#039;re experimenting with a project that&#039;s taking you into new territory with regard to your experience or knowledge.  I&#039;ve suffered that recently whilst writing code for a PIC to control a serial GLCD (hacked from a Nokia phone) and could have done with such a device.

Great blog, well done.

Brian</description>
		<content:encoded><![CDATA[<p>I found it hard to believe that they could be actual crickets, especially as they periodically seemed to shut up, so I started wondering if perhaps the capstan motor was in trouble!<br />
But I&#8217;m guessing your new camera uses solid state storage anyway, so I&#8217;m probably wrong there.  Damn loud those crickets!!!</p>
<p>It&#8217;s funny you should do a blog on Logic Analysers because just yesterday I was shopping around for one on the internet.  I have quite a nice storage scope for most of my needs but it&#8217;s quite useful to have a logic analyser kicking around every now and then.  Especially if you&#8217;re experimenting with a project that&#8217;s taking you into new territory with regard to your experience or knowledge.  I&#8217;ve suffered that recently whilst writing code for a PIC to control a serial GLCD (hacked from a Nokia phone) and could have done with such a device.</p>
<p>Great blog, well done.</p>
<p>Brian</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Kathy Quinlan</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3569</link>
		<dc:creator>Kathy Quinlan</dc:creator>
		<pubDate>Mon, 16 Nov 2009 07:25:31 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3569</guid>
		<description>http://www.pctestinstruments.com/

That is the LA I use, it is good for debugging code ;) I actually found a bug in some code I bought (they were initialising the LCD in the wrong order ) I also use it to debug serial streams between devices :)

It takes up very little bench space and I run it on both my desktop and laptop (good for in the field ;)

Regards,

Kat.</description>
		<content:encoded><![CDATA[<p><a href="http://www.pctestinstruments.com/" rel="nofollow">http://www.pctestinstruments.com/</a></p>
<p>That is the LA I use, it is good for debugging code <img src='http://www.eevblog.com/wp-includes/images/smilies/icon_wink.gif' alt=';)' class='wp-smiley' />  I actually found a bug in some code I bought (they were initialising the LCD in the wrong order ) I also use it to debug serial streams between devices <img src='http://www.eevblog.com/wp-includes/images/smilies/icon_smile.gif' alt=':)' class='wp-smiley' /> </p>
<p>It takes up very little bench space and I run it on both my desktop and laptop (good for in the field <img src='http://www.eevblog.com/wp-includes/images/smilies/icon_wink.gif' alt=';)' class='wp-smiley' /> </p>
<p>Regards,</p>
<p>Kat.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: EEVblog</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3565</link>
		<dc:creator>EEVblog</dc:creator>
		<pubDate>Mon, 16 Nov 2009 03:51:18 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3565</guid>
		<description>Not IN the garage, they are just damn LOUD!</description>
		<content:encoded><![CDATA[<p>Not IN the garage, they are just damn LOUD!</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: TrentO</title>
		<link>http://www.eevblog.com/2009/11/16/eevblog-44-part-2-logic-analyzer-tutorial/comment-page-1/#comment-3564</link>
		<dc:creator>TrentO</dc:creator>
		<pubDate>Mon, 16 Nov 2009 03:43:22 +0000</pubDate>
		<guid isPermaLink="false">http://www.eevblog.com/?p=417#comment-3564</guid>
		<description>Very informative! Thanks Dave.

-Trent

P.S.: Do you have crickets that actually live IN your garage?</description>
		<content:encoded><![CDATA[<p>Very informative! Thanks Dave.</p>
<p>-Trent</p>
<p>P.S.: Do you have crickets that actually live IN your garage?</p>
]]></content:encoded>
	</item>
</channel>
</rss>
