No Script, No Fear, All Opinion
RSS icon Home icon
  • EEVblog #193 – FPGA Implementation Tutorial

    Posted on August 7th, 2011 EEVblog 17 comments


    Dave recently implemented an Actel Ignoo Nano and Xilinx Spartan 3 FPGA into a design, so decided to share some rather random notes on how to implement the FPGA’s in this scenario.
    From datasheet specs, traps for young players, global clocks, FPGA fabrics, core power supplies and decoupling, getting the schematic basics, JTAG and flash PROM interfaces and finally PCB fanout and routing of a tiny 0.4mm pitch BGA package.

    Be Sociable, Share!
    • Ray Jones

      I can’t help but ask.

      I noticed your “1.5V” LT3080’s were using 180K resistors.
      Wouldn’t that give 1.8V?

      This was the case one both the designs you presented.

      Magic smoke release agent?

      • http://www.eevblog.com EEVblog

        Yeah, that’s a cut’n’paste error whilst hacking up the existing project before showing it on video. It would have come out ok in the wash.

    • Mitch

      Thanks for another great video Dave. Timely too, you have answered a number of questions I have had about one of my current projects.

      Cheers!

    • Neil

      Dave, Great for a refresher. The way things are going all electronics designs will be going down this route. Even configurable filters for RF designs look like they are going to be placed in BGA packages. What next!

    • gohai

      Thanks for the video, Dave!

      Any chance I could buy one of these basic Actel prototype boards? I know they have a starter kit for $99, but yours is much more minimal – which I like. If only manufacturing the board and having the FPGA mounted would not be so expensive..

      greetings

    • John

      Over an hour long EEVblog episode (longest so far?) and I can’t but to think of Dave’s T-shirt! Were all the EEVblog shirts in the laundry?

      • Johm

        First thing I noticed after the middle play button ;)

    • http://Www.mylivingdesktop.com Kevin

      Dave this was a GREAT tutorial on FPGA’s. I’ve never done any designs with FPGAs and the was very informational to me. Thanks!

    • Sebastian

      Excellent introduction. Please do more of these videos.
      Maybe you could make a series about a little (FPGA / microcontroller) project in which you show how to design the board, pick the right parts and finally get it manufactured and programmed.
      Most of the steps are already covered in other videos – you could reference to them, so you don’t have to explain stuff twice.

    • adam lumpkins

      Once agin Dave, GOOD JOB!!!!!

    • Len

      Dave,
      You used that tiny BGA chip in a real design, right? How did you solder up your prototype? Did you reflow it yourself?
      Or get a single prototype board custom-manufactured?
      Or use a different chip in a more convenient package for the prototype?
      Or are you too macho for prototypes?

      (Great video, btw)

    • http://www.teamsesco.com Touchscreen Repair

      This was an awesome tutorial on FPGA’s. Very interesting, I will have to try that soon!

    • John Alexander

      Top Banana! really enjoyed the whole hour and went through and cleared up a few thinks thanks.

      How about some VHDL or similar tutorial with some end point in mind?

      I’ve recommended this to a few people already.

      Good work!

    • PeteV

      Hi Dave! Nice Episode.
      It would be very cool and educative if you did some series on PCB Design, some simple projects, how to do it with altium and the general basic tips of PCB Design for newbies to start up from scratch.
      Cya!

    • Drone

      Dave,

      What are the write cycle and retention lifetimes for the flash on the Actel CPLD? Usually flash on very parts with very small dies with very low operating voltages and power suffer from low program cycle survival (like 100 times) and short retention life (like five years or so).

      This was an excellent post Dave. Technically, please take things up a notch (like this) more often.

      Rgds, David in Jakarta

    • Pingback: implementation of vhdl code on cpld

    • Kevin C.

      Nice bit of info, Dave. One minor comment. You have a typo in the first schematic. The label for JP1 says “Core Volatge Select” instead of “Core Voltage Select”.