EEVblog #452 – Stanford Research SR430 TeardownPosted on April 10th, 2013 1 comment
Inside the Stanford Research SR430 Multi Channel Scaler Photon Counter
Unboxing video here: http://www.youtube.com/watch?v=bfp0QnQujvs
Forum Topic HERE
It seems that even the fast SRAM they used were not fast enough so they had to divide them in two banks, odd and even to enable faster write rates.
Memory interleaving was used tens of years ago also in minicomputers at board level.
I believe today it done at the chip level to increase performance.
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