Author Topic: Altium Gerber Export - Board Outline  (Read 46977 times)

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Offline dfnr2

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Re: Altium Gerber Export - Board Outline
« Reply #25 on: March 08, 2012, 03:10:30 pm »
I used to use a separate mechanical layer as mentioned above by several others. 

More recently, I've been using a 20-mil thick outline on the actual top and bottom copper layers, in order to flag a design-rule clearance violation if any tracks or pads get too close to the edge.

That is what the keepout layer is for.

That's what I had originally thought as well, but when moving routed sections around, you can still place copper too close.  I have tried creating a clearance rule with first criterion being on, for example, the top layer, and second criterion existing on the keepout layer, but this did not generate any violations. 

As far as I can tell, the only way to actually check the circuit is correct is to place a copper trace around the edge.  I am unable to find any downsides in this approach so far, other than having to place a note in the readme file.  I'd be interested to learn if you can think of any.  I would of course be interested in any ideas on how to to accomplish the check more directly.  Having only used the software for a year or so, I consider myself a relative beginner.

Regards,

Dave

 

Offline Rufus

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Re: Altium Gerber Export - Board Outline
« Reply #26 on: March 08, 2012, 04:21:13 pm »
That's what I had originally thought as well, but when moving routed sections around, you can still place copper too close.  I have tried creating a clearance rule with first criterion being on, for example, the top layer, and second criterion existing on the keepout layer, but this did not generate any violations.

The downside is the board house will think you are a pain in the ass asking them to remove spurious bits of copper from the PCB. On the other hand some seem to expect a board outline on one copper layer to accommodate useless CAD packages that can't do better. I once had a board house incorrectly remove what looked line 'outline' traces but were actually there to pull back the copper on two plane layers.

The most basic general clearance rule between All and All should make clearance checks between keepout and all copper layers. Traces also have a keepout property which allows them to be used for layer specific clearance rules without generating anything in the gerbers.
 

Offline dfnr2

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Re: Altium Gerber Export - Board Outline
« Reply #27 on: March 12, 2012, 01:43:36 am »
Just played around with the keepout layer.  I must have done something wrong before; it is indeed doing just the right thing.  So for my current designs, and going forward, I'll be placing the board outline in the Mech1 layer, and copying it to the keepout layer as well.  Live and learn!  Thanks for the pointer.

Dave
 

Offline zoey

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Re: Altium Gerber Export - Board Outline
« Reply #28 on: May 16, 2017, 07:19:07 am »
Got same question here, thanks a lot!!!
 

Online tszaboo

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Re: Altium Gerber Export - Board Outline
« Reply #29 on: May 16, 2017, 07:39:27 am »
Got same question here, thanks a lot!!!
Same answer, thx for asking.
 


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