Altium Gerber Export - Board Outline

[x18]

a new problem: how to create a board outline in my gerber files? do i have to draw an outline by myself for example in the top layer? or is there any special command?

[Psi]

I did the outline in altium designer before i generated the gerbers.

The first thing i did was to draw continuous tracks/arcs around my design to mark the shape i wanted, then i selected all these tracks/arcs and clicked the option to derive board shape from objects. This made my pcb look the right shape.

Later on i added more tracks around my design (old ones had been deleted) I set these tracks to be on their own mechanical layer which i renamed to 'BoardOutline'.
I wasn't sure if the outline track would be cut out with a router bit in the center (thus removing material ether side of the track center. So i made the track really thin, so it was more obvious that it was an outline rather than a router path.

Then on the 'fabnotes' layer i had text to say the boardoutline layer was to show the edge of the pcb for routing.

I dunno if that's the correct way to do it, i wanted the fab house to do my pcb with rounded corners and they did exactly what i expected.

I think i also told them about wanting routing in the website notes section when i submitted the gerbers.

Also, don't forget to include any extra layers you have (fabnotes,boardoutline) when you generate the gerbers.

[joelby]

I usually just do my outline in the overlay layer and have never had any trouble.

It's worth moving the board to the origin as well!

[EEVblog]

I draw the board outline on a mechanical layer and export that as a separate gerber layer.
Be sure to set the board reference point on that outline (I use bottom left corner), and also select the outline and set it as the board outline in Altium (menu option). That enables the 3D mode to work correctly.
You can use other layers (like silkscreen or copper) but those are messy, better to have juts one mech layer devoted to the board outline.

Dave.

[x18]

Ok. I think I did everything right. I hope iteadstudio doesn't critize the gerber files I sent them.

[shadewind]

I second Dave on the separate layer. In Altium, I usually use Mechanical 1 for this.

[x18]

I drew it into the Top Overlay Layer. Hope thats not a problem.

[EEVblog]

I drew it into the Top Overlay Layer. Hope thats not a problem.

It's not really, they'll figure it out, that's their job.
It's just that if it's a thick line then you'll likely get some silkscreen around the edge of your board and that can look messy.
They use the center of the line as the marker, so some people do that and complain why their silkscreen board outline is "chopped off".
Using a thin 1thou outline shows that it's obviously for mechanical detail, but I often use 5 thou on the mechanical layer so it shows on screen better.
Having separate layers is much nice, as it allows you to turn the layer off and on at will, and then if you want to do a silkscreen board outline, it's easy to place the silkscreen line just where you want it inside the board cutout.
It is common to use a keepout layer for a board outline too, so then you can place copper pours and do DRC checks etc easily.
But really, the mechanical layers are there for this specific reason, use them.

Dave.

[Psi]

So does the machine router path (that's used to cut your board out) get positioned so the edge of the cutting bit follows the centre of your board outline tracks?

eg.. The router path follows a track which is larger than your board outline track center by half the width of whatever router bit size they use?

Is that correct?

[EEVblog]

So does the machine router path (that's used to cut your board out) get positioned so the edge of the cutting bit follows the centre of your board outline tracks?

eg.. The router path follows a track which is larger than your board outline track center by half the width of whatever router bit size they use?

Is that correct?

Correctamundo. They handle the offsetting of whatever size router bit they use.
So if the specify a 50mm wide board from center to center of the outlines, you get a 50mm wide board.

Dave.

[gxti]

I use the KeepOut layer, this also conveniently sets back any fills by a little bit from the edge of the board. I haven't had to use any internal keep-outs though so it would probably cause problems if I needed those.

[hesam.moshiri]

Hello,

I want to generate Gerber files in Altium Designer, but I don't know why it doesn't generate outline or keep out (*.GKO) in Gerber files correctly and always it's blank! (board has Keep out layer as well).

By the way, I also changed that keep out to one mechanical layer also (GM1) to maybe see any difference, but also it generates blank page for this also.

What's the problem?

[EEVblog]

Hello,

I want to generate Gerber files in Altium Designer, but I don't know why it doesn't generate outline or keep out (*.GKO) in Gerber files correctly and always it's blank! (board has Keep out layer as well).

By the way, I also changed that keep out to one mechanical layer also (GM1) to maybe see any difference, but also it generates blank page for this also.

What's the problem?

Do you have those layers selected in the check boxes before outputting? (silly question)
Other than that. if the other layers generate correctly and those ones don't, then it sounds like a nasty bug.
If it's urgent, contact Altium support directly would be your best bet.

Dave.

[hesam.moshiri]

Hello,

Yeah, of course, I always select relative layers' check boxes. and yes, other layers published correctly except this outline border line. really it's strange and I think, as you mentioned maybe it's a bug. I use version 10.7.

[EEVblog]

Hello,

Yeah, of course, I always select relative layers' check boxes. and yes, other layers published correctly except this outline border line. really it's strange and I think, as you mentioned maybe it's a bug. I use version 10.7.

AD10 has LOTS of bugs and issues.
But something like Gerber generation is a show stopper. I'd get in contact with Altium (whoever's left there) and get them to fix it for you ASAP.

Dave.

[hesam.moshiri]

Thanks, I'm waiting for results.

[EEVblog]

Let us know how it goes.
I've heard occasional reports over the years on the Altium forum about such gerber issues, but have never encountered any such thing myself using any public release version.

Dave.

[hesam.moshiri]

Let us know how it goes.
I've heard occasional reports over the years on the Altium forum about such gerber issues, but have never encountered any such thing myself using any public release version.

Dave.

Yeah, the amazing thing here is even when I change it with other layers like TopOverally, Bottom Layer .... , it still doesn't include it 

[hesam.moshiri]

Yeah 

Finally I found the case of problem. this Keepout check box must be unchecked, otherwise it will never ever printed in Gerber!!. look at the picture bellow.

[mobbarley]

I think you'll find it will automatically end up on your GKO layer (if you export it)... Not 100% on that though...

[JuKu]

There is a keepout layer. Everything you draw on that is a keepout, and that's where traditionally board outlines are drawn. Then there are layer specific keepouts, that are design aids only, and are not included in Gerbers. Two somewhat different things with the same name, no wonder this confuses first time users.

[EEVblog]

Finally I found the case of problem. this Keepout check box must be unchecked, otherwise it will never ever printed in Gerber!!. look at the picture bellow.

Ah, of course, obvious once you know!

Dave.

[Randall W. Lott]

Design > Board Shape > Create Primitives From Board Shape

I always use a dedicated mechanical layer with 5mil tracks for the board outline.  I place dimensions for the overall board cutout as well.  This is something your manufacturer will appreciate.  It will also benefit you when you're taking a quick glace to check sizes.

I apologize if you already knew or weren't interested in this.  Take care.

[dfnr2]

I used to use a separate mechanical layer as mentioned above by several others. 

More recently, I've been using a 20-mil thick outline on the actual top and bottom copper layers, in order to flag a design-rule clearance violation if any tracks or pads get too close to the edge.  I put a note in the "README" file to this effect, and indicate that this copper should not be on the actual board.  I suppose I could just use tracks during development and then delete them at the end, but this is easy and consistent, and I have never had a problem with it.  The altium facility for creating primitives from the board outline and vice-versa is a wonderful thing.

Dave

[Rufus]

I used to use a separate mechanical layer as mentioned above by several others. 

More recently, I've been using a 20-mil thick outline on the actual top and bottom copper layers, in order to flag a design-rule clearance violation if any tracks or pads get too close to the edge.

That is what the keepout layer is for.

[dfnr2]

I used to use a separate mechanical layer as mentioned above by several others. 

More recently, I've been using a 20-mil thick outline on the actual top and bottom copper layers, in order to flag a design-rule clearance violation if any tracks or pads get too close to the edge.

That is what the keepout layer is for.

That's what I had originally thought as well, but when moving routed sections around, you can still place copper too close.  I have tried creating a clearance rule with first criterion being on, for example, the top layer, and second criterion existing on the keepout layer, but this did not generate any violations. 

As far as I can tell, the only way to actually check the circuit is correct is to place a copper trace around the edge.  I am unable to find any downsides in this approach so far, other than having to place a note in the readme file.  I'd be interested to learn if you can think of any.  I would of course be interested in any ideas on how to to accomplish the check more directly.  Having only used the software for a year or so, I consider myself a relative beginner.

Regards,

Dave

[Rufus]

That's what I had originally thought as well, but when moving routed sections around, you can still place copper too close.  I have tried creating a clearance rule with first criterion being on, for example, the top layer, and second criterion existing on the keepout layer, but this did not generate any violations.

The downside is the board house will think you are a pain in the ass asking them to remove spurious bits of copper from the PCB. On the other hand some seem to expect a board outline on one copper layer to accommodate useless CAD packages that can't do better. I once had a board house incorrectly remove what looked line 'outline' traces but were actually there to pull back the copper on two plane layers.

The most basic general clearance rule between All and All should make clearance checks between keepout and all copper layers. Traces also have a keepout property which allows them to be used for layer specific clearance rules without generating anything in the gerbers.

[dfnr2]

Just played around with the keepout layer.  I must have done something wrong before; it is indeed doing just the right thing.  So for my current designs, and going forward, I'll be placing the board outline in the Mech1 layer, and copying it to the keepout layer as well.  Live and learn!  Thanks for the pointer.

Dave

[zoey]

Got same question here, thanks a lot!!!

[tszaboo]

Got same question here, thanks a lot!!!

Same answer, thx for asking.