DRC Error: Minimum Annular Ring on unused interior pad shapes.

[SVFeingold]

Hey everyone, I've been having this issue and haven't found a satisfactory solution. I'm kind of tired of spending 90% of my DRC time verifying stuff that shouldn't have been flagged to begin with. Worse yet, it's a good thing I noticed the DRC error limit because otherwise I would have missed real DRC errors that were truncated by what I'll now call "Altium Diarrhea."

Anyway, the problem is simple: once I am finished routing a board I will usually remove internal unused pad shapes on vias. I keep the pad shapes on the top/bottom layers for ease of manufacturing. Once I run the DRC however I'll get several hundred to several thousand errors of the type "Minimum Annular Ring: (Collision <4mil) Via." When I examine these errors it is showing that every unused pad shape that was removed generates an error on that layer. Umm...hello, how the hell do you implement that feature and NOT tell the DRC tool about it? Of course there is no annular ring...that's the entire point!

In short, I can't see an easy way to eliminate this error in the DRC rules and I haven't thought of a suitable query to target it.

Has anyone else solved this problem, and how did you do it? I've uploaded some screenshots so you can see what I'm on about, showing the Unused Pad Shape settings, DRC errors, and an example of an error. Thanks!

[Araho]

I believe you need to set a spesific rule for the internal layers to 0mil, simple as that. Currently, it reports (correctly) a violation of what the rules say, which is no less than 4 mil what so ever.

Obviously, you'd think this would get updated when you run that tool, but I don't think it does. This is fine by me - don't change the design rules without explicitly warning me.

[T3sl4co1l]

Anyway, the problem is simple: once I am finished routing a board I will usually remove internal unused pad shapes on vias.

Doing thing causes errors?

Then don't do thing! 

Rule checks can be set under T, D (Tools / Design Rule Check), other tab.  Can also set if you want a report file, or how many rules to barf on (500 default).

Obviously, you can also disable rules from D, R (Design / Rules) by setting them to zero, having them apply to nothing relevant, or restricting them to useful layers (annular ring is only required on outer layers for thru and blind vias).

FYI, fab outputs have option set by default: "remove unused pads on internal layers", so you're wasting your time to begin with.  (Check the Gerber Outputs option on the OutJob file.)

Tim

[SVFeingold]

Doing thing causes errors?

Then don't do thing! 

Rule checks can be set under T, D (Tools / Design Rule Check), other tab.  Can also set if you want a report file, or how many rules to barf on (500 default).

Obviously, you can also disable rules from D, R (Design / Rules) by setting them to zero, having them apply to nothing relevant, or restricting them to useful layers (annular ring is only required on outer layers for thru and blind vias).

FYI, fab outputs have option set by default: "remove unused pads on internal layers", so you're wasting your time to begin with.  (Check the Gerber Outputs option on the OutJob file.)

That's a nice solution but if a feature exists it should be able to be used in a predictable manner. The reason I don't want to use the option on the fab output is that I need the extra clearance during the routing. It's not purely a matter of manufacturing.

To that end, I apparently forgot my own workflow and misspoke in my OP: I DO actually use it during routing. If I need to route a couple of traces between 2 vias on a BGA footprint, I can't do that if the annular ring is present, and removing it after I'm ready to fab the board is not helpful.

Setting an annular ring rule on internal layers would work but this will also skip over legitimate annular ring violations which I'm not too thrilled about.

[langwadt]

Doing thing causes errors?

Then don't do thing! 

Rule checks can be set under T, D (Tools / Design Rule Check), other tab.  Can also set if you want a report file, or how many rules to barf on (500 default).

Obviously, you can also disable rules from D, R (Design / Rules) by setting them to zero, having them apply to nothing relevant, or restricting them to useful layers (annular ring is only required on outer layers for thru and blind vias).

FYI, fab outputs have option set by default: "remove unused pads on internal layers", so you're wasting your time to begin with.  (Check the Gerber Outputs option on the OutJob file.)

That's a nice solution but if a feature exists it should be able to be used in a predictable manner. The reason I don't want to use the option on the fab output is that I need the extra clearance during the routing. It's not purely a matter of manufacturing.

To that end, I apparently forgot my own workflow and misspoke in my OP: I DO actually use it during routing. If I need to route a couple of traces between 2 vias on a BGA footprint, I can't do that if the annular ring is present, and removing it after I'm ready to fab the board is not helpful.

Setting an annular ring rule on internal layers would work but this will also skip over legitimate annular ring violations which I'm not too thrilled about.

http://www.altium.com/video-unused-pad-removal-tool ?

[SVFeingold]

Yes, that's exactly the tool I'm using that is causing the DRC errors.

[T3sl4co1l]

To that end, I apparently forgot my own workflow and misspoke in my OP: I DO actually use it during routing. If I need to route a couple of traces between 2 vias on a BGA footprint, I can't do that if the annular ring is present, and removing it after I'm ready to fab the board is not helpful.

Setting an annular ring rule on internal layers would work but this will also skip over legitimate annular ring violations which I'm not too thrilled about.

Ah yes, I've done this here and there.  I forget if I simply don't run annular ring check.  I've not had it complain before.

Next time I'm inside a design with that, I'll take a look at the rules and checks.

Tim