Author Topic: Mosfet spice netlist export problem  (Read 2313 times)

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Offline NarsideTopic starter

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Mosfet spice netlist export problem
« on: August 31, 2018, 12:20:07 pm »
Hello to everyone. I've faced a problem with simulation of some MOSFET circuit. The idea is:
1. I have the PSpice model of the following format
.model IRF9610 PMOS(Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0.2 Vmax=0 Xj=0
+ Tox=100n Uo=300 Phi=.6 Rs=.721 Kp=10.37u W=.64 L=2u Vto=-3.814
+ Rd=1.524 Rds=888.9K Cbd=222.3p Pb=.8 Mj=.5 Fc=.5 Cgso=1.517n
+ Cgdo=30.29p Rg=2.4 Is=886.1E-18 N=4 Tt=1100n)
2. I draw schematic of an amplifier based on 1 MOSFET and attach the model as .mdl
3. During simulation couple of warnings appear like "unknown parameter Tox, Rs" etc.
4. I create exact the same schematic in LTspice, attach Mosfet model as Spice directive. The result is ok, no warnings etc.
5. I decided to export the netlist from AD to LTspice and the simulation result is NOK like in AD.
What is the reason? Wrong syntax? How to properly export the netlist containing MOSFET model from AD to Ltspice
I've attached the AD netlist and LTspice file.
 

Offline T3sl4co1l

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Re: Mosfet spice netlist export problem
« Reply #1 on: August 31, 2018, 03:19:36 pm »
Welcome to the wonderful* world of SPICE.

No two simulators are the same.  Many are derived from XSPICE, a free mixed-signal simulator base.  They are differentiated by proprietary features: PSPICE support (PSPICE itself is popular enough that it's a defining feature of support by other simulators), various levels of models, digital code models, different solving methods and tweaks, etc.

You may find this useful:
https://techdocs.altium.com/display/AMSE/Metal+Oxide+Semiconductor+Field-Effect+Transistor+(MOSFET)+Model
that said, TOX and RS are supported by Altium so I don't see why you got an error on it.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline NarsideTopic starter

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  • Country: ru
Re: Mosfet spice netlist export problem
« Reply #2 on: August 31, 2018, 06:32:48 pm »
I've figured out the problem. It was due to i used p-mosfet model from internal libraries, and the port layout was wrong. I've changed it to source-gate-drain instead of drain-gate-source and it worked well in ltspice
« Last Edit: August 31, 2018, 07:16:17 pm by Narside »
 


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