Hi folks,
I'm getting a short circuit constraint violation in Altium and I don't know why respectively I don't know how to ged rid off.
At the end of my routing I added a polygon on my GND net (GNDA) and now there is no clearance between some of my routed nets and the polygon.
Does anybody know how to fix this? It's strange that other nets don't have this problem.
Another issue is that some vias don't have enough clearance (e.g. +5V_A)
Thank you very much in advance!
Kind regards