Test Points - Plated VS Unplated?

[dansku]

Hey, I was doing a design check on one pcb, and I am getting errors saying Unplated multi-layer pad(s) detected

I would like to understand what is the difference and problem from Unplated multi-layer pad(s), and I am also using them as VIAS.
Am I doing it wrong, and if so, what is the best way?



Thanks, 

[ahbushnell]

Shouldn't a via have a non zero hole diameter?

[dansku]

Yes, but I am using it was a Test Point (please don't shoot me  )

[free_electron]

why do you want an unplated pad as a testpoint. ? if there is no plating there is no electrical contact ....

unplated holes are for mounting purposes.
plated holes are for component pins ( pads ) or interconnection ( vias )
both pads and vias can be a testpoint. simply check the assembly or fabrication testpoint flags.

[Mikekoz13]

The only reason I could see to have the hole(s) unplated is if you're putting some type of swaged in test point (terminal) in the holes. Other than that .... plated.

[dansku]

Thank you guys,

Changed all my Test-Point library to platted 

[T3sl4co1l]

If you want test pads without holes, set the Pad object to Top Copper.  Then you get an SMT pad.

Tim