unused pins, declaring as unused

[gogoman]

Hi in the schematic  several parts have unconnected pins  after compilation the pins  appear as error.
to a void this, can pins be declared as not connected, how?

thank

[ebclr]

The error is there to help you.

Normally inputs must be connected to something, can be ground or VCC, Outputs you can leave disconnected.

If you don't want to connect, and wanna "force the thing " set the pin to highZ

[Fire Doger]

Place "No ERC" on unused pins.
http://www.altium.com/documentation/15.1/display/ADES/Sch_Obj-NoERC((No+ERC))_AD

[DerekG]

Hi in the schematic  several parts have unconnected pins  after compilation the pins  appear as error.
to a void this, can pins be declared as not connected, how?

Surely it is as easy as in DipTrace where you simply right click on the pin & selected "unconnected". A small cross is then placed on the pin so it is obvious.

A group of us have been sending the DipTrace Design Team requests to have the better functions in Altium replicated in DipTrace & I'm sure this was one of the requests on that list (which was implemented 4 or 5 years ago from memory).

[julianhigginson]

as already mentioned by fire doger, you go into place the No ERC directive objects mode, and place them on whatever pins you have confirmed do not connect to anything.

Setting pins of the actual schematic part to an "NC equivalent" type when they're not actually that type is not a good idea, unless the pin is literally defined as an Do Not Connect pin in the datasheet...

you either have to have a library part in your library with those pins defined incorrectly for the actual part - what if you (or worse someone else) wants to reuse the part in your library for something else?

or you have to modify the pins on the part in the sheet - then, what happens if that part gets refreshed form the library one day?

[T3sl4co1l]

Surely it is as easy as in DipTrace where you simply right click on the pin & selected "unconnected". A small cross is then placed on the pin so it is obvious.

Almost as easy.  Type P, V, N first, then click the pins desired.

FYI to the OP:
ERC (Electrical Rules Check) is a tool that you use to help verify the correctness of your design.  For example, to avoid driving outputs from other outputs, or to leave inputs hanging (the case here).  It is specific to digital logic designs.

If you design is not helped by such a tool, you may consider simply disabling it under Project Options.  (You can set the error condition from error to warning to disabled, as you wish.)

In analog designs, it is typically a hindrance: most of the pins are usually passive type (ignore ERC) to begin with, or at the very least, bidirectional -- not in the digital / ERC sense, but literally, that the current and voltage may flow with either polarity.  There can be no use in arbitrarily assigning transistor collectors and emitters as inputs and outputs, when they are used for both.

Analog designs are usually small, and so they can be manually verified on design review.

Analog designs, built with hierarchical design methods, can use ERC rules on sheet symbols.  This is good for, for example, an op-amp filter subcircuit, where the output connectivity follows the same rules as digital outputs.

There's honestly not that much value in ERC anymore, as nobody does large digital logic designs by hand.  That checking is handled, by and large, by the FPGA synthesizer.  You might still find value in ERC for connecting up such a design, though (making sure there's no crossed wires between, say, the IO bank and the SDRAM and peripherals).

Tim