4-channel Pt100 interface --- schematic/board review

[KaneTW]

I set out to design a SPI -> 4x Pt100 interface based on the TI ADS124* ADC series. I made the attached schematic, BOM and board file (in EAGLE format). Any comments or ideas as to what I could've missed?

My design goals:
* Get as much accuracy out of the ADC as possible while using 3-wire Pt100s
=> matched trace lengths for all analog inputs
=> low-tolerance resistors (especially Rbias)
=> low-noise linear voltage regulator
* Try to adhere to circuit design best practices (split analog/digital part, etc)

Questions:
* Are there obvious improvements to the PCB layout?
* Is ESD protection necessary, or is the built-in stuff enough?

Board:
Front:

Back:

I tried to upload the .brd, but it wouldn't let me.

[awallin]

stitching the top/bot ground-planes together a bit more wouldn't hurt.

These kind of measurements tend to be quite sensitive to RF interference. If you switch on an RF-source (say 1-100MHz) in the lab the circuit usually 'rectifies' the RF and it shows up as a DC-offset on the temperature.
If you are concerned about this then maybe more filtering, perhaps a common-mode choke (?), on the voltage sensing lines would be good!?

Does the chip allow measurements with current in both directions through the pt100? to take out voltage offset in the amp+adc?

Do post your results here - it's interesting to see what stability you get e.g. if you replace the pt100 with a low-tempco 110R resistor and let it run for a few days. Below 1 mK is hard in my experience..

[edpalmer42]

My very limited knowledge of PT100 sensors is that 3-wire sensors are normally used in a bridge configuration so that line resistance is nulled out.  I'm not seeing that here.  Also, your designations of Vref, Vin, and Vout suggests a different sensor than I'm familiar with.

Can you give some more info on the sensors you're planning to use?

Ed

[KaneTW]

There are indeed two current sources in the chip, and I feed them in both directions. The core idea of the circuit is based on the 3-wire ratiometric reference design by TI, which is basically:
(from this PDF http://www.ti.com/lit/an/sbaa201/sbaa201.pdf)

The designations are a bit silly, but it's basically a standard 3-wire Pt100 as in that TI schematic.

Line resistance is nulled out by using two excitation currents, both in in and out direction.

Will post results once I make it (probably won't be until next month).

[KaneTW]

Some first results:

a 110Ohm+-0.1% resistor is measured as 110.00669..110.0105 after offset and gain calibration (although the gain calibration was a bit shoddy) without any RF shielding in a pretty noisy environment (next to PC/phone/etc)

Chopping is performed to reduce current source mismatch (idac1/idac2 are swapped once and the results are averaged)

--which is about +-0.05C accuracy

I'll test later with RF shielding.

[KaneTW]

Here's a plot of the measurements. Notice how much the measurement dropped once I moved out of the room (taking my phone with me).

Once I can mount my device in a RF shielded enclosure, it should perform much better. Also need to redo the offset and gain measurements with RF shielding (and ideally at more scales than just 0 and 110 Ohm -- time to shop for a precision decade or something)

[KaneTW]

I tossed it into a Hammond enclosure (haven't screwed it in yet and there's a small gap for the cables on top) and wow, there was a fairly significant measurement offset over the RF-noisy environment I have (~0.02Ohm).

Touching the enclosure with a multimeter lead still crashes the device. Once I get my oscilloscope hopefully I can debug that. Probably issues with the power rail, but who knows.