5 digit pulse counter

[carbon dude oxide]

hello i am working on a project that is a 5 digit pulse counter which takes pulses from reed switches or other kinds of switches and displays the amount of pulses it receives on 5 7-segment displays.

i am just going over this project to see if i can improve it or find a different way of doing it, my only limitation is that it has to be done with cmos chips and logic gates
here is what i have on this project so far:

schmitt trigger for the switch debounce going into a 74hc393 which is chained onto each digit (acting as the unit counters) these are then put into a 4543 cmos chip to drive the 7-segment displays

the 74hc393's are linked to eachother like a chain and have 'and' gates connected so that they reset the count to 0 when it reaches to 10 and then it also sends a pulse to the next 74hc393 in the chain to bump that digit up 1

i have 4.7k pull down resistors on all the bcd lines between the chips and on the clock lines, i do not have any decoupling capacitors as the pulses are only going to be 0.5-30 seconds apart and i do not see the need for them (please correct me if i am wrong

it would be really help full if anyone sees any improvements or problems that may occur with this project and any help on this would be greatly appreciated, thanks.

(i do not currently have a circuit diagram of it but i can make one on request)

[baljemmett]

i do not have any decoupling capacitors as the pulses are only going to be 0.5-30 seconds apart and i do not see the need for them (please correct me if i am wrong

I would always chuck some basic decoupling on; it's not particularly difficult or expensive to add, and is vastly more likely to be a help rather than a hinderance.  Especially since pretty much every time I've shrugged and thought "this won't need decoupling" I've found myself to be wrong!

Note also that how often pulses come in has little bearing on how much decoupling might be needed; more important is how big the spikes in current draw are when something happens.  Also consider that one input pulse could cause a varying amount of activity and thus a varying dip in the supply voltage -- for instance, your worst-case scenario I think would be all five of your digits changing within a very short time as the carry signals ripple along the chain.

(Also note that I'm mostly at the 'muddying along' stage of my electronics learning, so I could be completely wrong, but I think I'm on fairly safe ground here...)

[TerminalJack505]

If you use 74HC390s instead of 74HC393s you can get rid of the AND gates.  The 74HC390s are decade counters so they already reset to 0 after reaching a count of 9.  They will chain directly to each other without any glue logic to ripple count.

[carbon dude oxide]

I see thanks for the advice on the 390 and 393 i shall modify my design for that

[codeboy2k]

Since you are using CMOS technology you will need decoupling. No matter how "slow" your pulses are, the edge rate and thus the switching speed is very fast and requires high current.

CMOS devices consist of large quantities of MOSFET gates that need instantaneous gate charging and discharging in order to change states.

The decoupling caps close the body of the chip will serve to provide the high current supply needed close to the device, in as short a loop as possible.  This helps with EMI. The short loop helps the chip get the current it needs to switch.

Without the decoupling caps, the current loop will be very large during the switches, as it will have to source current from the far end of the supply, across the ground planes, and thus involving the planes in the loop.  This will generate EMI, and the inductance and capacitance of the wires and planes from the chip to the suppy (and the main filter cap) will likely causing ringing in the planes, leading to ground bounce.

Finally, this ground bounce can raise the ground reference of other chips on the same ground plane, thus closing the gap between Voh and Vol and now you lose your noise margin on that chip, and it can't output a Low signal during the bounce (or the bounce causes fluctations in it's ability to output a low level signal... this propogates to what ever inputs that output is serving, and then those inputs start causing state changes in that chip... you get the picture.. it's a mess, and you find that nothing works, but you don't know why.

As baljemmett said "always chuck some basic decoupling" ... "it's more likely to be a help than a hinderance"

I hope I've described why this is the case.

[carbon dude oxide]

i see i shall get into the habbit of putting them on then

ive linked a schematic with this post of the design currently, the caps in the top left are the decoupling caps and i shall move them into place when i begin the layout of the board.

Please tell me if there is any problems with this schematic thanks

[baljemmett]

Please tell me if there is any problems with this schematic thanks

From a quick glance at the 74HC390 datasheet (I was curious about the chip myself, having not seen it before!), I think you need to connect each stage's B clock input to the QA output of the same stage, instead of grounding it -- it looks like the chip contains independent divide-by-2 and divide-by-5 counters, and you need to wire them up differently depending on how you want it to behave.

[carbon dude oxide]

what does it mean by divide by 2 and 5 counters i saw it on the datasheet but i was unsure what they were.

[TerminalJack505]

baljemmett beat me to it.  Yes, you need to wire the 74HC390s as he describes. 

The datasheets don't make it very clear.  If you have a copy of the book Practical Electronics for Inventors, 2nd Ed then page 710 shows a circuit very similar to what you're designing.  It uses 74LS90s but those are functionally similar.  You can find some examples with Google image search too.

[carbon dude oxide]

i do not have any books i should probablyh get some as i currenty use the internet as experimentation as my only sources of infomation.

[codeboy2k]

what does it mean by divide by 2 and 5 counters i saw it on the datasheet but i was unsure what they were.

counting is dividing. For example, if you count to 10, then output a pulse, you will easily see that every 10th count (10 clocks) is an output pulse.  Thus you have divided a clock by 10, while counting to 10.

So counters are also dividers, more generically.

The part (74HC390) has 2 separate dividers in each half of the chip, and each divider has a separate clock and common resets (per half)
It can be wired as  divide-by-2, 4, 5, 10, 20, 25, 50 or 100.  You can think of these as count-to-2, 4, 5, 10, 20, 25, 50 or 100. same thing.

So to divide by 10 (count to 10) first divide by 2 then divide by 5.  So you need to wire the divide-by-2 Q output to the divide-by-5 clock input.

the other divide-by's are available if you wire them up.. for example.. ÷2 -> ÷2 -> ÷5 = ÷20 , ÷2 -> ÷5 -> ÷2 -> ÷5 = ÷100, etc.

the divide by 100 configuration gives you a BCD counter 00-99 in one chip, just as you've wired it, with the last output (of the ÷5) going to the ÷2 clock input of the next stage. But as it's been said already, you also need to wire the ÷2 output to the clock input of the ÷5 in each stage (to make each stage a ÷10). Don't ground the second clock input as drawn in your schematic.

[carbon dude oxide]

ah i see

here is the revised schematic

[TerminalJack505]

I just noticed a problem.  I'm not sure what you're trying to achieve with the Johnson counter but you have several of the outputs shorted together.  If you're trying to drive more than one LED segment with the outputs then you'll need to use diodes or something to keep a high output from shorting with a low output.

[carbon dude oxide]

that end part just makes a chasing led in a figure of 8 each time it pulses, it stops on the G segment several times in the loop

well in theory...

[TerminalJack505]

A couple other things...  You shouldn't need the pull-down resistors on the outputs of the 74HC390s.  The outputs will always be driven high or low so they're unnecessary.

The large 1uF cap on the Schmitt trigger's input could be a problem when you shut the circuit off.  There should be a diode going back to Vcc to allow the cap to discharge.  This is to protect the Schmitt trigger's input when you power the circuit down. 

You can switch the 7414 to a CMOS part too just to avoid any problems that can arise from mixing the two technologies.  The 40106 is a CMOS Schmitt trigger.  (I don't think they're pin compatible, though.)  If you use a CMOS Schmitt trigger than you need a resistor between the cap and the trigger's input.  This, along with the diode is to protect the trigger from the capacitor during power-off. 

The book The Art of Electronics explains why this protection is necessary.  You would think the IC's input protection diodes would cover this case but I'm sure the authors know better than me.  (Or maybe the book's out of date.)

I've attached one of my schematics that shows an example of the two things mentioned above.  (The diode and the resistor.)

that end part just makes a chasing led in a figure of 8 each time it pulses, it stops on the G segment several times in the loop

Ah, well just put a diode on each of the outputs to prevent a short.  The resistor value may need to be adjusted because of this.

[carbon dude oxide]

ok here is the next revision of the circuit

i put the pull down resistors in due to a previous post that i had made and i was told that i should put some between lines such as that between chips to prevent fluctuations ect.

[TerminalJack505]

The last problem I see is the 7414.  I just checked the 'good book' (The Art of Electronics, it has a section on interfacing different logic types.)  You need to put a pull-up on its output.  This is because TTL outputs can only be driven to about 3.5V.  They suggest using a 4.7k pull-up.  They mention that you will have limited fanout as well but you should be okay.

Once that's fixed you should be ready to breadboard it.

[carbon dude oxide]

i see, when i breadboarded it without the 4.7k pull up it worked fine but i shall add the pullup to be on the safeside

[TerminalJack505]

Yep.  3.5V just happens to be the minimum guaranteed V_IH for 74HC series logic so you'd be pushing your luck without the pull-up.

[carbon dude oxide]

thank you all for the help

[carbon dude oxide]

jut to make sure here is the latest revision of the schematic

[TerminalJack505]

thank you all for the help

No problem.

jut to make sure here is the latest revision of the schematic

Looks good.  Ship it!   

[carbon dude oxide]

the most annoying thing about this is that it needs t be single sided when being printed :/ stupid school having basic pcb etching equipment

[carbon dude oxide]

Sorry to re open a dead post, the circuit was all made and i powered it up a couple of time and it all worked. I then went to give it to the person i was making it for and i pluged the battery back in but all the digits were dim, some were displaying 8 and only the first two were counting but dimly. I said to the guy take it home and warm it back up as it was very cold when i was standing outside waiting to give it to him. He has tried it again and it is still not working. What could be causing this?

[TerminalJack505]

I'd say Dave's number one rule for fault finding is where you should start: check voltages.  Sounds like it is just a dead battery. 

If it's cold then you also have low humidity to worry about because that makes ESD more of a problem.  Something might have gotten fried.

I fried some MOSFETs once just by handing the board they were on to someone else.  It was winter and the humidity was low.  We both had just walked across the carpet.  Zap!  There was this huge static shock and I instantly knew something likely got fried.