Just for S&Gs, I did it in one 555:
https://www.seventransistorlabs.com/Images/555%20Boost.pdfGood for about 5W at the values shown.
Gimmicks:
- Peak current mode control (see UC3842, etc.), constant off-time oscillator
- Uses 555 for current comparator, latch and gate driver
- Error amplifier regulates output voltage precisely
- TL431 provides accurate voltage reference
Pitfalls:
- 555 has one adjustable comparator threshold, and the other is half that. Namely, when V(THR) >= V(CTRL), the output is turned off. This is good for a peak current mode controller (if we simply put V(current) on THR, we have the entire output stage solved!), but terrible for a current sense (V(CTRL) is typical 10V!)
- I used a common base amplifier (noninverting voltage gain) to solve this. With a gain of about 10, the current shunt resistor sees a peak of 1V amplified to a ~rail sized voltage.
- The CTRL pin has internal resistors loading it down. Beefy resistors, 3.3k Thevenin equivalent. This sucks for driving, and the LM358's crossover distortion and current output limitations are evident. Just have to grin and bear it.
- The TRIG threshold is half of V(CTRL). This is the only way to begin an output cycle (there are no other "trigger" inputs). This is the logical place to start for closing the loop and making it oscillate, but the variable threshold frustrates stable timing. We could add a second 555 as clock source, and not have to worry about poor timing.
Thinking about it, I noticed, if the timing capacitor could be charged up to V(CTRL) every cycle, and discharged towards ground with a timing resistor, then that would solve the timing problem, to first order*.
The time constant is then given by the time taken for the capacitor to discharge by half, i.e. from V(CTRL) to V(CTRL)/2, where the factor of 1/2 comes from the 555's internal divider resistors. This is ln(2)*R*C. R10 and C4 are the timing components, giving a 3.2 microsecond delay.
*(Higher orders, with respect to time, are problematic: CTRL is being used as a control input, meaning its value will generally change over time. That means, so will the timing. Timing wouldn't change if the capacitor's instantaneous voltage also varied proportionally with V(CTRL), but that's a trick we can only pull in SPICE. Relatively over-damped compensation is probably desirable, to limit how fast V(CTRL) varies, preventing weird interactions between oscillation frequency and line and load ripple.)
The real situation is not ideal, however: Q2 cannot charge the capacitor fully to V(CTRL). A diode drop is lost, which hastens the delay. In particular, when V(CTRL) < 1.2V, the delay goes to zero. The condition arises at low supply voltage and high load (usually during startup). The result is maximum output duty cycle, which tends to brown out the supply and melt the transistor! D2 was added to help prevent this.
This gives a switching frequency around 140-200kHz, depending on supply and load.
I can probably nix the LM358 as well, by using the TL431 directly. Having an open collector output is rather inconvenient, so I'd have to add a complementary follower to give it a proper sink-and-source output.
To convert this to an isolated flyback supply, wire the error amplifier as a unity gain inverter, and wire up the optoisolator and secondary-side TL431 (error amp) as usual. (The primary side TL431 is no longer necessary and can be replaced with a voltage divider.)
Tim