Thanks grumpydoc that did the trick. The line looks much better now.
Good.
To see more (i.e. a longer loop) set the main timebase slower and fiddle with the var sweep speed until it produces a clear trace and then use the x10 mag to stretch things out so that you can see the individual transitions. You can follow loops with perhaps 8-10 instructions this way which is enough to bit bang an interface and follow what's going on
If you choose which signal to trigger from carefully - M1 is good because that is active on the opcode reads - you can "walk" the other probe along several signals one at a time to build up a picture of what's happening.
If you get confident you can feed the trigger signal to the ext trigger and then look at two other signals together.
Look at the signatures of the two loops on the 'scope - they look different - one will give you M1/MREQ, MREQ, MREQ fairly evenly (4, 3 and 3 clocks apart). The other will give you M1/MREQ, MREQ,<pause> with the pause being the bit where the CPU calculates the destination of the jump.
You now have a debugging tool - you can do a test and get the CPU to jump to one of those loops. Since they look different on the 'scope you can tell which way the test went.
It's worth adding a single, simple 8-bit output port to you hardware design - just an octal latch and some address decoding. This won't need any complex set-up like the peripheral chips do you can just output bytes to it. You can then use that to generate triggers for the 'scope or light LEDs for debugging.
Z80 tip of the day:
If you look at the data sheet you will see that the OUT (C), A instruction is really OUT (BC), A so the Z80 has 64k of I/O space if you fully decode the address bus. If you want, this can be used to add an extra 64k of RAM.