1) Surge: how to handle it properly on mains input and logic's side?
Huh, surge should never need to be tested on logic side.
An 8/20us surge of modest amplitude is usually clamped by the input capacitor. Things may be...interesting, for an active PFC circuit. (Often, a diode is placed from rectifier output to mains bulk cap, so that startup inrush is handled,
and surge is clamped.)
If you have to do higher energy surges (like 10/1000us and with more current), an active PFC circuit would actually help you, as the choke DCR will help isolate the surge from the rest of the circuit. Use big MOVs on the input to absorb the surge. Maybe one across the DC link cap too? Maybe not...
I am talking about static discharge (in EMC test that 2kV taser gun). As far as I read, there are several options.
Oh, ESD? 2kV, that's it? Most ICs can handle that, bare! What are you using that can't?
It's usually 8/15kV (contact/non), or a class A operational requirement, where you need extra parts.
Providing a path to ground, away from ICs, is the important factor. TVS, clamp diodes (clamps to supply rail, which is bypassed and/or TVS'd to GND) and big capacitors are the usual approach.
Chokes: helps prevent from spikes coming from grid... but does not help with static discharge somewhere in circuit after it.
MOVs: few time deal with tendency to blow up. Are they worth putting in protection circuits at all if there are other options?
For surge, MOVs are the best. Nothing else comes close in sheer energy capacity.
TVS: cheap, reliable... but I haven't seen them being used in power supplies a lot. Am I missing something here?
Cheap? Hardly. Try finding one that can absorb a tenth as much energy as a MOV. Silicon is expensive in bulk!
Quite reasonable for a few cents per logic pin, though. ESD is very different from surge.
PTC: from what I get the only purpose is to limit in-rush current...
NTC*. PTC is a fuse-like device, but the surge is long over by the time that thing even begins to heat up. The time constant is about 10,000 times slower than a surge.
A PTC+TVS device would do a good job against very slow surges (supply swell, automotive load dump) though.
My main problem here was that when DUT was undergoing "taser test", all logic died (well, not permanently, but at the moment of shock), and that is not acceptable. How do You handle situations like these?
Where was the ESD being applied to?
Class C acceptance is usually sufficient for ESD and surge. So I take it you need class A?
It all matters about what you need -- what are the specs!
2) High frequency emissions - low-pass filters everywhere?
This is something I cannot see with equipment I have (me not so rich to have lab like Dave). 
What is the best way to avoid having high frequency emissions without being able to monitor them at design stage?
Digital signals: low-passes everywhere? Power lines: bulk capacitance? Calculate LCR's basically at every node? What is Your approach to this one?
Emissions aren't easy to predict, but you can at least put a few likely options in the layout, and see which ones do the job.
If nothing else, consider the circuit as a three terminal device: AC input, ground, and DC output. As long as both 'hot' terminals are filtered to ground, you're good.
Of course they aren't single terminals, but pairs of terminals: AC hot/neutral, DC +/-. But that's okay: the principle remains the same, you just put more windings on the chokes -- use CMCs. You also can't use very much capacitance (because ground leakage and isolation voltage), but that just means you need even bigger chokes (hence, ~mH's).
What you do, between the CMC(s), depends. A Y-cap between mains-side DC- and output DC- sometimes helps. Sometimes not. Sometimes the cap is better to ground instead.
I built three different voltages of this basic flyback power supply, with three different transformer wind-ups:
As you can see(?), each has a different combination of Y caps (tan colored). The left one also has an output CMC (red wire and red toroid).
Precompliance emissions testing is easy enough with a LISN. You can use an oscilloscope to monitor the emissions: you're looking for peak or ringing signals of more than a few mV height. Likely, an unfiltered SMPS design will have around 1V of noise, which is easily seen. If you've filtered it well enough that you can't see any noise on an oscilloscope (usually you need 10s of mV to trigger on), you're doing pretty well. A spectrum analyzer of course gives you a better idea.
The LISN can be built as well:
http://seventransistorlabs.com/Images/LISN1.jpgTim
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