Accelerated capacitance circuit

[Ravenghost]

Hi,
I was analyzing this http://www.atmel.com/images/atmel-42183-design-a-buck-converter-with-xmega-e_ap-note_at04204.pdf application note and stumbled across an interesting circuit called "accelerated capacitance circuit". Has anyone got more information about such circuit and what capacitor values should i be looking for?

[Yansi]

That term smells bullshit to me, never heard anyone calling it that way. But it is a common type of circuit.

The principle is such, that as to turn off and on the transistor fast, there is a large current spike through the capacitor, that opens and most importantly closes the transistor faster, as the BE junction charge is carried away faster through the cap, not through the base resistor.

For a small signal transistor, youre looking at something about tens to 100pF and for a bigger power BJT one you can use up to some hundred nF, depending on the base currents and BE charges involved.

[Yansi]

And by the way, the circuit in the atmel appnote is stupid, the same can be done better with only two NPNs or with one NPN and one small NMOS respectively.

To be more specific: Throw away both R2 and C4 and replace Q2-PNP with a single schottky diode anode to the mosfet gate, cathode to collector of Q3.

Q2-NPN then works as an emitter follower forcing positive voltage on the gate; Q3 discharges the gate through the schottky, cutting also base current to he Q2-NPN emitter follower.

[edavid]

I was analyzing this http://www.atmel.com/images/atmel-42183-design-a-buck-converter-with-xmega-e_ap-note_at04204.pdf application note and stumbled across an interesting circuit called "accelerated capacitance circuit". Has anyone got more information about such circuit and what capacitor values should i be looking for?

That app note was obviously written by a non-native English speaker.  The correct term is "speed up capacitor".  The value is usually determined by experimentation.

[Ravenghost]

Thanks everyone for answers helped me a lot!

And by the way, the circuit in the atmel appnote is stupid, the same can be done better with only two NPNs or with one NPN and one small NMOS respectively.

To be more specific: Throw away both R2 and C4 and replace Q2-PNP with a single schottky diode anode to the mosfet gate, cathode to collector of Q3.

Q2-NPN then works as an emitter follower forcing positive voltage on the gate; Q3 discharges the gate through the schottky, cutting also base current to he Q2-NPN emitter follower.

Wouldn't one need to use some kind of charge pump circuit to drive NMOS in high side configuration?