Active Op-Amp Feedback Configurations

[sddavis14]

Hi everyone,

I have a general question about Op-Amp feedback loops. I've encountered design situations where it seems like it would be useful to put a secondary amplifier in a feedback loop. For example, take this circuit:



This is designed to force a 1A current through the load no matter the load resistance (within limitations). I know there are better ways to implement a circuit that performs the same function. However, I am curious if there are any fundamental issues with using the secondary differential amplifier in the feedback loop. I know stability will probably be an issue - but is that something that can be fixed with some simple compensation caps/filters? It seems like this configuration could be useful in a lot of different situations. I've done a lot of googling, but I just can't find any good app notes or documentation concerning placing op-amps in feedback loops.

Thanks.

[rstofer]

I sure doesn't seem like it will work.  The upper op amp will be at one rail or the other, all of the time.  Except for when it is oscillating.  Then again, I don't know a lot about op amps.

http://www.ti.com/lit/an/slyt103/slyt103.pdf

[sddavis14]

Hi rstofer,

The circuit definitely works conceptually. I've simulated it and it does produce 1A of current through the loop with the load resistor. Of course I know simulations are not always indicative of real world behavior, which is why I'm curious. I've looked at that app note and It doesn't really answer my questions. I'm curious about the rules of thumb and general guidelines for designing op-amp circuits like this.

[danadak]

This circuit looks to be noting more than M1/OA1 acting as a constant I source,
and OA2/R1 acting as a high side current sense. Seems legit, but redundant in
that OA2 is really not needed. But it is clever in that this is a current source, not
sink, so simplified version (one OPAmp) has error term related to supply stability.
This eliminates that as long as diff amp is well balanced for R ratios that control
CM rejection.

Regarding using OAs in a fdbk loop, you have to look at phase margin of the loop.
You can calc that or use time domain techniques (disturb loop with impulse and use
scope to look at ringing/phase margin) to get an idea of what loop is doing. There is
a ton of phase margin/loop compensation ap notes online discussing these issues.

http://search.edaboard.com/measure-phase-margin-and.html



Regards, Dana.

[MosherIV]

Do not forget another real world op-amp problem : input offset voltage.

This will cause a output on op2 voltage even when there no current flowing.
Can be corrected by adjusting R2 or R4.