Lots of people seem to be having confusion over what constitutes a "signal", and what constitutes "digital" or "analog".
Let me clarify these.
All signals are analog.A signal is a time-varying quantity; in electronics, usually voltage or current.
No signals are purely digital, because you can always zoom in on them closer and closer, with the oscilloscope, and find a smoothly rising edge, and measure the "on" and "off" voltages as something other than abstract '0' or '1'.
Digital is an interpretation.This is why digital is a subset (hierarchically subordinate) of analog. Only an abstract digital signal can be truly digital: having only values of '0' and '1' (or any other levels that exist within your framework), and transitioning instantaneously between them.
The way digital signals are traditionally interpreted is by placing thresholds on an analog signal. Consider the 74HC series logic gate. The inputs are defined valid for V_IH > 0.7 V_DD and V_IL < 0.3 V_DD (let V_SS == 0V). The outputs transition smoothly between valid logic states (under standard test conditions) over a few nanoseconds.
Therefore, all digital circuits are inherently one-bit (or more) ADCs and DACs. If you consider a logic circuit to operate only in the abstract (in the '0' and '1' domain), these thresholds are performing the conversion, and the input/output states are considered indeterminate during the finite-duration edges.
Standard ADCs and DACs are engineered to have much more precise thresholds (e.g., a comparator is a one-bit ADC with a typically millivolt or smaller threshold range), and more of them (12 bits = 4096 levels, etc.). Logic pins can usually depend upon having looser thresholds by design.
Most logic circuits can, quite reasonably, be modeled this way, where abstract logic states convert with analog signals only at the pins. You can specify the entire contents of an FPGA this way, entirely in '0's and '1's. Whether analog considerations (beyond propagation times) have been taken into account in that process, you don't really know (the toolchain hides that from you), and you get your digitally-coded analog signals at the pins (in your choice of logic flavor, at that!).
Note that digital logic doesn't need to be clocked. That it is, is merely a convenience of typical design practice. Actual signals will present themselves at different times (intentionally or not) relative to a clock signal; the purpose is to further synchronize the system so that it is even easier to analyze (Moore type FSM) and synthesize (e.g., memory table and latches). Anything from computers to communication can be done with variable timing, or none at all; all that matters is that it can be processed coherently, which usually means a stable, fixed clock. Point is, it's a convenience, not a necessity.
Radio Signals.As with the definition of normal digital, radio signals are a matter of definition. If I have some property of a carrier which changes relatively suddenly, who are you to say I didn't mean to do that, as an analog signal?
Radio signals are characterized by having a relatively narrow bandwidth for their center frequency. There are some wideband signals, but they are difficult to use (the signal chain, including antennas and propagation through space, must have very stable delay characteristics at all frequencies, so the signal does not interfere with itself). As such, the appearance on the oscilloscope is that of a sine wave, which changes slowly over time, such as by amplitude, phase or frequency. (Phase and frequency are linearly dependent, phase being the integral of frequency. Amplitude is independent.)
As with the digital logic gate, thresholds can be defined. In this case, in a more complicated way, which will require more than a few transistors to implement.
QAM-4 is a very typical mode illustrating this:
The continuous signal is first modeled as an AC steady state signal, having sin(wt) and cos(wt) components summed together.
The relative amplitudes of each are then assigned values based on a digital input (or interpreted as a digital output).
The resulting "AC steady state" signal has a linear combination of orthogonal (in-phase and quadrature) components. Typically, these plot the cardinal directions on the complex plane (i.e., 0, 90, 180 and 270 degrees, constant magnitude). You can also model such a signal as a constant amplitude with varying phase (i.e., phase modulation, in polar coordinates), or constant but impulsive frequency (FM, where the frequency only changes momentarily when phase shifts).
Whereas digital logic signals are made as sharp and wide as possible (to ensure valid logic levels for as long a time as possible), radio signals are reduced in bandwidth (transition time grows) as much as possible. The eye diagram is a tool used to measure the stability of these transitions. The "eye" is drawn by the waveform making repeated transitions, and the 'pupil' is the time window, and voltage threshold, which distinguishes between '1' and '0' (or however many states the system happens to have).
Tim
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