AtMega32u4 battery powered

[Tiflo]

Hello,

I am working on my second project and I have some question about the AtMega32U4 wiring. I don’t want to use the 5V from the input USB so I have cut the trace from the USB connector. Instead I’m using the 5V coming from the 12V -> 5V buck convertor. The USB data lines are connected to the AtMega through a USB Hub chip.
In fact, I don’t know how to wire properly the AtMega in this configuration, particularly for the pins VBUS, UVCC, UCAP and UGND, related of the USB supply which I don't use. The datasheet isn’t clear for me and I didn’t find any example. Do you have a clue ?
One more question, this is my second board layout, and the first one in SMD. The left part of the board can draw a large amount of current. Should I split the bottom layer ground plane between the logic and power side ?

Schematic : http://bit.ly/29QQVHv
Routing : http://bit.ly/2a6xNnW

Thanks for your help,

Tiflo

[Signal32]

I think the scenario you're looking for is described in figure Figure 21-6 of the datasheet, page 259. Check out the wiering that they suggest.
http://www.atmel.com/Images/Atmel-7766-8-bit-AVR-ATmega16U4-32U4_Datasheet.pdf

As for the ground plane, probably not, post your schematic, what is powering the micro and what is powering the power side ?

[Tiflo]

Thanks for your reply.

The schematic and the layout are linked in the first post : http://bit.ly/29QQVHv
I saw this figure in the datasheet, so if i'm correct :
UVCC going to the external 5V
UCAP to 1uF cap
UID ? I don't know this pin !?
but the problem is VBUS ... i'm not using it because only the datalines are connected to the usb hub IC. Should I leave it floating ?

As for the ground plane, probably not, post your schematic, what is powering the micro and what is powering the power side ?

The entire device is powered by a 12V car battery. The powerside is directly connected to it and the logic / usb hub side is powered by a 5V buck convertor (LM1084)

[Kilrah]

The mentioned schematic suggests that you need to connect VBUS to the VBUS pin even when not powering the device with it. As explained on page 265 it's used to detect when USB is plugged.

[Signal32]

UID ? I don't know this pin !?
but the problem is VBUS ... i'm not using it because only the datalines are connected to the usb hub IC. Should I leave it floating ?

You should connect VBUS to the USB voltage (5V) as the datasheet recommends.
UID is the extra pin that you have on for example Micro-Usb connectors. It is used for indicating OTG mode ON/OFF.
http://electronics.stackexchange.com/questions/35462/why-does-micro-usb-2-0-have-5-pins-when-the-a-type-only-has-4

Also, I would not split the ground plane.
PS Nice layout

[Tiflo]

The mentioned schematic suggests that you need to connect VBUS to the VBUS pin even when not powering the device with it. As explained on page 265 it's used to detect when USB is plugged.

I don't have VBUS pin on the USB hub chip : http://www.kean.com.au/oshw/WR703N/GL850G%20USB%20Hub%201.07.pdf
I missed the paragraph page 265, thanks !

You should connect VBUS to the USB voltage (5V) as the datasheet recommends.
UID is the extra pin that you have on for example Micro-Usb connectors. It is used for indicating OTG mode ON/OFF.
http://electronics.stackexchange.com/questions/35462/why-does-micro-usb-2-0-have-5-pins-when-the-a-type-only-has-4

Thanks for the explanation about UID.

Also, I would not split the ground plane.
PS Nice layout

Noticed.
Now I'm scared to send it to the pcb manufacturer ... not confident with the Kicad DRC 

[Rerouter]

Kicads DRC has worked just fine for me in the instance of are these traces or vias too close, or too small.

To that end it should produce your board just fine, but with all cad packages, check your Gerber's if you want to be 100% confident

[Tiflo]

Kicads DRC has worked just fine for me in the instance of are these traces or vias too close, or too small.

To that end it should produce your board just fine, but with all cad packages, check your Gerber's if you want to be 100% confident

It shows me a lot of errors and it is difficult to see which is normal or not.
The netclass rules are OK on the rest of the board, but they causes issues when they arrive on the fine pitch IC where the rules can't be followed. There is a possibility to definitively hide those errors ?
I also get errors on the usb differential pair corner, I don't know why ... they are routed with constraints.

Sorry for the french UI

[Rerouter]

If the rules cannot be followed on a chip, might i suggest going to design rules up the top and setting them up to what your manufacturer can reproduce, if a chip is too small to meet these rules, then they will not meet the manufacturers requirements either,

From your list with the multiple REF** entries, i would say you have added parts manually rather than at the schematic level, and as such lacks a netlist entry, on the left side of your image it would appear you have manually added stitching via's,

To better do this, there is an option on the left edge of the program to turn off delete old tracks, this way you can via stitch without issue, under general you can also turn off magnetic pads and traces if you want to place them in arbitrary positions on the traces,

some of the other errors i would need to see the log to decode for you,

[Tiflo]

If the rules cannot be followed on a chip, might i suggest going to design rules up the top and setting them up to what your manufacturer can reproduce, if a chip is too small to meet these rules, then they will not meet the manufacturers requirements either

The USB trace require 12mil spacing. I think when the trace is attached to the pad, it try to apply the rule to the entire pad. But the pad spacing is smaller than 12mil ... which raising an error.

For REF parts, they are related to plane vias. I added the manually and don't know if there is a better way to do that. I have tons of them, so I can't place them on the schematic side.

To better do this, there is an option on the left edge of the program to turn off delete old tracks, this way you can via stitch without issue

I will look at this option, thanks

There is a false error and the DRC result in attachment.

[Rerouter]

on that one looking at the length of the problem traces it would appear you indeed have a tiny spec of a trace from the other net at that point,

Ah so your setting a netcall rule for the usb traces, yes that will be in error because it does indeed treat the rule as a rule,

for the latest release version of kicad you can instead use the opengl differential router, that will handle your width and seperation, and you can even tune for differential skew quite easily, (the demo video pretty much tells you everything you need to know to use it), only annoyance is having to change the renderer from default to opengl under the veiw options to use it, but once your done you can switch straight back,

e.g. the attached image is my own first attempt at routing usb, using a 0.3mm board, the chip i am using places both crystals directly next to high speed usb, so i went a little crazy on the via stitching... and as i had yet to use the new tools went out of my way to tune it aswell,

[Tiflo]

I'm already using the lastest Kicad version in openGL mode (F11 shortcut) and the differential router. It's a really powerfull tool !
How did you implement the via ? Using a new part ?

Edit : Thanks for the vias stiching idea, I wasn't aware about this ... so added to my design.
Plus TVS on the input datalines and 1M resistor between the crystals
Gerber checking with ZofzPCB software is amazing !!

[Rerouter]

I implemented the stitching using the trace tool, so click to start trace, place via hotkey end trace hotkey, that way its tied to the net, and i don't get any DRC problems,