Author Topic: Automatically disconnecting devices from SPI lines during ISP programming  (Read 1401 times)

0 Members and 1 Guest are viewing this topic.

Offline HwAoRrDkTopic starter

  • Super Contributor
  • ***
  • Posts: 1477
  • Country: gb
Lately I've been doing some programming for a board I designed, and came across an annoying phenomenon which occurs while I am programming the AVR microcontroller over the ISP connection. I'm wondering if I can do anything to mitigate it.

I have three input channels of a ULN2003 connected to the same pins of the AVR as used by MOSI/MISO/SCK on the ISP header. This ULN2003 is used to drive some relays. During programming - even though the relays have no power to the coils (because only the programmer is powering the board) - I get some high-pitched buzzing noises coming from the relays. I'm sure this is probably fairly benign (is it?), and nothing is being activated if they are somehow switching, but it's annoying, and I was wondering if I could do something about it.

One obvious solution that came to mind would be to somehow automatically disconnect those lines from the ULN2003 during programming. It's my understanding that the reset line is pulled low by the programmer, so I could use this state to also control such switching. I've read elsewhere that one solution (in the context of disconnecting other SPI devices during programming) that could be applied here is to use a 74HC126 buffer; the control pins can be hooked to the reset line, and the gate outputs that are connected to the ULN2003 would go hi-impedance when reset is pulled low.

However, I'm only in need of a temporary solution, so is there any way of doing this with common jelly-bean components I have to-hand? For example, a few simple N-channel MOSFETs?
 

Online Ian.M

  • Super Contributor
  • ***
  • Posts: 12860
The programmer must be back-powering the relay supply rail via the (presumably) 5V regulator feeding the AVR.   Patch in a Schottky diode in the feed to the AVR so that power on the ISP header cant get to the rest of the board.   N.B. this will compromise ADC accuracy if you are using Vdd for Vref, so when you've finished development, replace the diode with a wire link. 
 

Offline HwAoRrDkTopic starter

  • Super Contributor
  • ***
  • Posts: 1477
  • Country: gb
Ah, that makes sense, thanks. I will see if I can cram a diode in an appropriate spot. Solves the problem by eliminating the cause, rather than addressing the symptom.

Does such back-powering damage a regulator in any way?

Out of interest, my original question still stands: if I had devices on the SPI lines that I otherwise couldn't disable, would a 74HC126 be a good way of disconnecting them during programming? And is there a way of doing the same with jelly-bean parts?
 

Online Ian.M

  • Super Contributor
  • ***
  • Posts: 12860
Back-powering can damage any regulator not protected against it. Many regulator datasheets advise a reverse biassed diode between in and out to handle the case when there is a lot of bulk capacitance on the output, and when the input voltage collapses faster than the output drops at switchoff, due to other loads on the input supply.

The best option for development is probably jumpers to extra pins adjacent to the ISP header.  On production boards, order the chips preprogrammed, don't populate the header, and use track links (that must be cut on the prototype) to connect the extra circuits to the SPI pins.   If you need the ISP header on production boards and don't want to faff with jumpers, its normally more cost effective to use a MCU with more pins, or reallocate I/O pins so that the ISP interface shares pins with non-critical stuff that will tolerate the programming pulses.
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf