Bidirectional Logic Converters

[bgm]

Hokay people, 

Here is one that I'm sure that has come up *way* more often than it probably should have but I'm going to put it out there to see if anyone has got some better suggestions and ideas (yes, I've trolled the inter*not* and generally got more conflicting information than a group of lawyers at a truth conference .... but I digress)

What I want to do is interface a 5v CPU, memory, etc to a 3.3v FPGA (specifically, the processor is a WDC65C02SP which can work at 3.3v but there is other stuff on the bus which can't). 

To quantify frequency that I want (vs what I'm happy to start with), I'm trying to work this up to 20MHz eventually - right now, I'm happy with 1Mhz (if I can initially get it play nicely) ... and *before* anyone asks *why* a 6502, lets just say "because" and leave it at that ...  (I may post the entire back story if anyone really wants a giggle)...

The parts that are really important is the handling of the data bus (bidirectional) and to a lesser degree the address bus (unidirectional - always *from* the CPU, though I would like to actually try to implement a MMU for the 6502 in the FPGA which is where this is heading and if I can get that to work correctly, I would actually like to implement memory block copy, move, switch etc via a DMA so that would mean that the FPGA would then take over the bus and the address bus would then become bi-direcitonal). 

No ... I do *not* want to the implement the 6502 *in* the FPGA ...  (I'll pre-empt that question right up front as well) ....

There are a bunch of logic level translators on the market (e.g. TXB0108, 74LVC4245, etc) and here is where my questions start ... 

1.  Has anyone actually had much experience with actually using these things and how effective are they and what problems have people run into when using them? 
2.  From my reading of the data books ... err .... data sheets (yeah, really showing my age here), how effective is the automatic direction sensing of say the TXB0108 and how effective is it in determining which direction it *should* be translating from.  Is it best to 'trust' these chips to identify the correct direction or is it better to work with those convertors which actually require you to *specify* the conversion direction? 

In my example above, I can probably do both, as a the CS (chip-select) line could be used to indicate when the FPGA needs to sit up an pay attention and therefore in that case, when the convertor needs to be pulled from a high-impedence state (i.e. off the relevant busses) by enabling the !OE! line.  For directional control, the R/!W! line is probably a good source when logically 'or'd' with the FPGA control lines and that would allow explicit direction control for the data and address busses. 

3.  Any other 'gotchas' regarding using these things for young (*cough* ... ok that is stretching the truth a bit) players? 

Finally, yes, I did see Dave's video on his experience with using them but that may have been implementation specific (my take on it was that he doubled up to increase drive). 

4.  I've just mentioned the two above.  There appears to be quite a few on the market.  Any found to be better/worse than the others? 


/BGM
OFI

[jwm_]

5v CMOS parts will switch at 3.3, so just put a resistor and 3.3 V zener on each line. Or if the FPGA is 5v tolerant, just hook em together.

http://repetae.net/zenerresistor.png

[Scrts]

Or put a CPLD in between, which supports 5V and 3.3V. Altera use MAX II or MAX V for that AFAIK.

[retrolefty]

SparkFun sells a couple of convertors and link the device datasheet and include a schematic so would easy to just roll your own. Here is one example product:

http://cdn.sparkfun.com/datasheets/BreakoutBoards/Logic_Level_Bidirectional.pdf

[bgm]

All quite good suggestions so far, and I think I'll probably use one of them in this particular case. 

For a 3.3v<->5v, its not quite such a big deal and from the data sheet on the FPGA I've got - SPARTAN6 (XC6SLX9), I think the suggestions above *should* do the business just fine (providing that I give it sufficient juice, it should be able to output at a 3.3v level - at least that is my understanding from my reading - I'm quite happy to be corrected on that one - no desire to let the magic smoke out). 

.... but lets say I had to interface at 2.5v or even lower - say 1.2v to the 5v line ... the question that still remains is regard to those logic level translators - if they are used, is it better to use those with auto detection or not (and I'm assuming that that in that particular case, a logic level translator would be the best option), and if so - are there any pitfalls with using them? 

*UPDATE* : Remember, I need to do this for no less than 32 lines - 8 lines for data bus, 16 lines for address bus, 5 lines for bus control and another 3 for NMI, IRQ and reset!  Not all will be bidirectional - the data bus is initially the one I'm most concerned about as the others are *generally* unidirectional ... but I digress ...

[briselec]

The TXB0108 has low dc drive strength which means they won't work on a bus with strong pull ups. They're designed for things like SPI and SD cards. When I tried them I had trouble with them breaking in to oscillations.
I'd go with a 245 series.

[codeboy2k]

Is there any specific reason you chose a Spartan 6?  Do you need something only available in the Spartan 6 family, like serdes or the many different differential I/O standards it supports?

If all you need is 5V tolerance and level-translating to 3.3V peripherals (or even 2.5V, 1.2V), then I recommend the Spartan-II, you can still get it today and its IO banks can be setup for 3.3V output with 5V tolerant inputs. It's good up to 200 MHz.  The Spartan 6 seems like overkill for a 6502, but I really don't know what your intentions are for the FPGA.

If you really need the Spartan 6, then I would use the SN74LVC4245A. Don't use the automatic chips, why would you do that? Since you have bus direction signals from the processor, just use that.

[bgm]

In regard to the Spartan 6 - it's what I have on hand (its' on a little FPGA dev board), and that has a 40pin and 50pin 2.54 header connector along with the single 5v input for power.  I was hoping to try starting with that. 

End game really isn't to use a Spartan 6 as that is probably way overkill but I've got to start somewhere, so that is what I'm going to use (at least for now) to get my feet wet with interfacing a 6502 and some old school ICs to the newer generation stuff while banging my head against wall learning Verilog and VHDL. 

In regard to the question as to why a FPGA?  Well, I'm hoping to create a soft FPU, MMU and also have enough room left over to recreate a whole daughter board that does a whole bunch of really "interesting" things in the FPGA. 


<WARNING -  FOLLOWING CONTENT MAY PROVOKE THE SHAKING OF THE HEAD AND POSSIBLY A GIGGLE OR TWO>

Background to all of this is that I'm trying to do a new spin on some control boards that were designed and built *many* years ago (how long ... try 35+ years), but are *still* in production nowadays  (seriously ... this stuff is *still* running). 

When the boards were originally created, I looked after the coding part.  The guy who did the board design and construction has now long passed away and some of the components that were used are now getting really hard to find (for example - the MOS 6526 CIAs are actually getting pretty rare and pretty expensive these days - a lot of the ones on the likes of eBay are just 6522s what have had the top sanded off and a bogus print stuck on the top of them - don't ask me how I know...) - so keeping them going isn't really an option for much longer (for a while there, I was buying 2nd hand Commodores on eBay just to rip the 6526s out of them). 

So, rather than just trying to rewrite a whole lot of logic (I did that once in my life - not again), I figure why not try to re-implement the hardware, but with the newer generation of stuff.  That means using a current 65C02S, some more recent static memory (to get away from the DRAM) and to drop the component count from about 180 odd separate discreet ICs, etc into something a *hell* of a lot smaller, that will use a lot less power but will do the same job and run the same code (minimal mods). 

.. and that is where I am right now, and what has precipitated all of this and why I'm trying to interface something like a FPGA which may be running at 1.2/2.5/3.3v to 5v logic and a 6502.... 

Am I insane? ... probably - but hey ... what the hell ... I'm game and I'm willing to give it a shot. 

[BloodyCactus]

I ran into a similar issue interfacing a Z80, I wanted to make an MMU sit between the Z80 and the bus, and the idea of doing 32-40 odd logic conversion... in the end I kept everything at 5v and found a 5v 40pin PIC to do the business, but i played with using some 74HC245 for level shifting.

[codeboy2k]

Am I insane? ... probably - but hey ... what the hell ... I'm game and I'm willing to give it a shot. 

Nothing wrong with that if you have the time and willingness, that's how you learn. 

If, as part of your job, you have to maintain older hardware with chip(sets) that are becoming scarce, then it might be a good time to redesign its functionality with modern parts -- trying to re-implement older parts in an FPGA will be a challenge, that's for sure, and maybe take more time than you're willing to give it.  Of course, if your goal is to learn an HDL at the same time then sure, give it a go