Brandon, just to clear up a misconception that caused you to get a bit confused with that 'transformer', any conductive path that is entirely outside the ferrite magnetic loop, is not a transformer winding, it's a shield.
The copper foils wrapped around that component act as shorted turns, absorbing stray magnetic (and electrostatic) fields that might otherwise radiate from the coil. You'll notice they are connected together, via one pin.
I'd expect that pin on the PCB to actually be connected to ground. Or at least the local 'zero volts' reference.
Also on your schematic, the FETs symbols are surely wrong. They show N-channel FETs, and with the g,s,d pins mislabeled. They are much more likely to be MOSFETs. Also one is more likely to be a single or dual diode.
Tracing circuits to derive a schematic, starting with an unknown PCB, is a very iterative process. It's better to do it with pencil and paper, and don't be afraid to redraw sections as you start to understand circuit function.
It also helps to use a fine-tipped felt pen to mark traces and component nodes on the PCB as 'done', once you've included them in the schematic. Also mark the components with numbers you assign, if the PCB overlay has no component designators. Saves a lot of confusion.
Another tip: Have a strong light that you can shine through the PCB. That helps register the side you're looking at with whatever is on the other side.
Alternatively, what I do to reverse engineer PCBs that are a bit complex, is take high-res photos of both sides of the board, and have them on-screen in photoshop while I trace the circuit. Combine them as semi-transparent layers, so you can see both sides of the board overlaid together.
That way I can add component designators and 'done' colour dots and lines to 'notes' layers on the images. Still draw the schematics by hand though, since sections will need to be redrawn over and over as functionality emerges. And by 'redraw', I mean start on a fresh sheet of paper, so you still have the earlier messy circuit to refer to.
Personally I don't see any reason to suffer the irritations of schematic editors unless one intends to produce a new PCB layout via the schematic -> netlist -> layout -> verify netlist cycle.