Expermenting with a pair of 2N7002's I released the magic smoke. The packaging looks intact so there's no visual evidence.
This thing is supposed to handle Vgs 20V and Vds 60V.
I applied Vgs=4.0V and Vds=4.0V without any current limiting and it was fine. Vds was pulling 300mA, whereas the datasheet shows maybe 350-400mA.
With Vgs=5.0V and Vds=4.0V, if I have a current limit on the PS of 500mA or thereabouts, it goes into limit mode immediately and Vds slowly rises -- seems reverse exponential, ie the rate of increase gets slower and slower over time like I would imagine how a cap charges. We're talking a second per tenth volt by the time I stopped watching. It never reaches 4.0V in fact it never reaches much above 3.0V. If I crank the current limit to 3A, the FET releases the smoke. I tried this on 2 parts and both behaved the same way. I don't know what the actual current draw is, ie if it's actually pulling 3A or what.
The Vgs PS and the Vds PS are isolated supplies in a single unit, running in isolated mode. I have the 2 grounds tied together.
Why does the FET fail like this? Shouldn't the FET limit/control the Id on its own, to the amount in the data sheet? In this case, Vgs=5.0V Vds=4.0V the data sheet shows Id=800mA. Datasheet for the exact part I'm using here: https://www.fairchildsemi.com/datasheets/2N/2N7000.pdf
The do-it-yourself curve tracer is a great idea. It illustrates lots of
things, and uses pyrotechnics to get the message across.
All the comments so far are on target.
SHORT ANSWER:
The transistor was operating way way outside its safe operating area.
The current started to drop off because it got really hot.
LONG ANSWER:
Take a look at figure 14. Though you were operating with Vgs = 5V,
and the graph assumes Vgs = 10V, the difference doesn' t matter much,
given that Vds < Vgs.
Now put your operating point at Id = 0.5 A. (And for the moment, imagine
that the solid horizontal lines extended to the left of the dotted Rds(on) limit.)
Where is the safe operating area? It pretty much says that a SINGLE pulse
longer than 10mS could cause unsafe things to happen for a typical device.
What unsafe things?
1) At very high currents, carriers arrive at the drain and find a high concentration
of fellow carriers. Some of them find the field created by Vgs provides a better
path than the path to the drain. A very few will tunnel toward the gate terminal.
("But it is insulated!" the crowd shouts. Well, there is some amount of gate-body
leakage even in normal operation, but in this case that insulator can only do so
much.) Some of these carriers don't make it to the gate and get "stranded" in
the gate insulation, forever to act as a counter-influence on Vgs. (They'll raise
the threshold voltage, or reduce the Idss.)
2) But more importantly, high currents bring thermal stresses to the contacts
that connect the device leads into the diffusion areas for drain and source.
These heat up, as they are not perfect conductors, and they are surrounded
by material that doesn't conduct heat so well. (Chip designers call this "joule
heating.") This "one time" event can damage the contacts permanently.
In some cases, it can cause the contact to fail open.
3) Finally, you're cooking a chunk of silicon that got to be the way it is
because somebody else cooked the same chunk of silicon in a very well
controlled environment with very very well controlled temperature. Your
environment and temperature aren't so well controlled.
So, getting back to Figure 14. Your one-time pulse was actually a DC
pulse. Elvis left your safe operating area way back at 40 mA for Vds = 5V.
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Now, why did you see the voltage drop slowly rise? (the exponential
observations was good...)
Take a look at Figure 3 -- the device is heating up. On resistance
rises with temperature. Temperature rises with power dissipation.
Power dissipation rises with on resistance.... rinse, lather, reheat.
But that doesn't account for all of it. The resistance of the contacts
(these are called by some "ohmic contacts" because their effect is
not governed by the carrier concentration in the channel, but by the
bulk resistance of the contact material) is going to rise with temperature.
Thus Vds rises as the device heats up.
There may be many other effects.
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Now for the final smoke emitting FET event:
A FET's max drain current is determined, largely, by the width of the
channel. From the top, it might look like this:
SSSSGGGDDDD
SSSSGGGDDDD
SSSSGGGDDDD
SSSSGGGDDDD
In this case, we'd say that the channel (the region under the gate)
is 3 units long and 4 units wide. Idsmax is influenced largely by
the WIDTH of the device. To get high Idsmax, we make a wide
device.
But designers don't want to make the gate terminal too wide.
If they do, the turn-on time can get longer (the gate is driven at
its ends, typically, and it has significant capacitance -- for really
wide gates, this can begin to cause the turn on pulse to take
measurable time to propagate along the gate), and there is
even a pathology caused by the ends of the gate cutting off
the channel before the middle of the gate does.
It is unlikely that this device is actually constructed as a single source/gate/drain
blob. More likely, it is multiple smaller devices all connected in parallel.
Each has its own drain/source metal contacts that lead to the device lead frame.
When you exceed the Idss(smoke) limit, one of those contacts will blow
because it was just too hot. Now the remaining current has to flow through
the rest of the parallel devices and contacts. Now one of
them will blow.
and so on and so on, like strands in a cable stressed beyond the breaking
point.
Eventually the drain-source path opens up, and sends its last signal:
a smoke signal.
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I have not mentioned so far, electromigration failure. This is a big problem
in high speed digital design, but is a wearout phenomenon. It is not likely
triggered by a one-time event, but overstressing (or even moderately-stressing)
a device can lead to early failure. The MTTF by electromigration goes
exponentially with temperature. I'm not sure it even happens in discreet
devices like the 2n7xxx, as it also depends on wires being narrower than
a critical size.
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Yet another long post. But this was a great question.