From the general style of the schematic shown, it seems likely that you are using LTspice. There are many LTspice users here, so you are far more likely to get help if you attach the sim (.asc file) so others can run it. If it uses your own or 3rd party, models or symbols, zip them up with the .asc file so we can be certain we are running the same sim.
With that out of the way, the usual way of implementing adjustable current limiting in a constant voltge PSU is to have two feedback loops, one for voltage and the other for current with an arragement so that the one demanding the lowest output has control. Classically one would use two differential amplifiers (e.g. long tailed pair) or OPAMPs, one comparing the setpoint voltage to the output voltage, and the other subtracting the voltage drop across a current sense resistor from a bias signal representing the desired output current, then have a pair of diodes and a pullup resistor so either could pull down the pass transistor drive signal and the lowest has control. The devil of course is in the details - as the feedback toop that doesn't have control is effectively open so tends to drive to its upper limit, which means that, due to the loop amplifier's limited slew rate, it takes time to recover, so when rapidly transitioning between CV and CC modes, it briefly overshoots the new limit. This can be mitigated by arranging for the inactive loop to stay closed, but with a fake feedback signal that keeps its output near but above the active loop output to minimise the timke it takes to regain control. Also with OPAMPs and other high gain amplifiers in the loop, phase shift round the loop means stability is a serious problem and without compensation it will be likely to oscillate. You need to do the loop analysis properly as mis-applied or over-compensation may make the situation worse, especially if you change the load, or seriously degrade the system's response to input ripple or rapid load changes.
For this reason hacks like a base pulldown transistor, roughly sensing the current through the pass transistor's emitter resistor are popular because they are fast enough and have low enough gain to avoid most of the stability problems. Back in reply #2, David Hess suggested how you could add an emitter resistor for Q3 and a current source (actually a sink) between Q3 emitter and the 0V rail to adjust its setpoint. Assuming it currently limits at 2.0A, a 0.3R resistor and a 1.5A current sink would adjust the limit down to 500mA. This is obviously impractical, but if you increase the new emitter resistor to 60R, it would only take 10mA to reduce the limit down to 0A, so an adjustable 0 to 10mA current source would give you full control. In practice the existing circuit wont limit at exactly 2A so the extremes of the current control range may have a dead zone or it may not actually reach the limit, so it will need a bit of tweaking to get good reliable results. Also due to the limited loop gain, the current limit will be rather 'mushy' - that's the price you pay for a circuit that is so simple and inherently stable.