Author Topic: Capacitor discharge timing with comparator  (Read 4060 times)

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Offline solarbotTopic starter

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Capacitor discharge timing with comparator
« on: May 05, 2017, 01:57:17 pm »
Hi volters,

I'm trying to understand a circuit I have so that I can replicate it in a simulator but have reached the buffers with my knowledge and wondering if anyone can explain and guide further?

Basically the circuit aims to measure an unkown resistance by charging a capacitor and then timing how long it takes to discharge through the unkown resistance down to a level of 1V from 3V - I think a comparitor being used to triger the point at which 1V is reached?  I have included a DSO screen grab which shows the real thing in action on a PIC16F627A: yellow = pin AN1 and blue = pin CMP1.  I think the first (2) flat line sections in yellow show the cap being charged followed by the discharge from 3v to 1V taking 5.48ms between the two cursors.  I have also attached my attempt at simulating the circuit (which doesn't work) and schematic of the circuit in reality.

Any pointers much appreciated :-)
 

Offline Conrad Hoffman

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Re: Capacitor discharge timing with comparator
« Reply #1 on: May 07, 2017, 02:19:03 pm »
Method should work if the capacitor is very good- use a high quality film type. For the sim, you need some switches. You  have to charge up the cap, then disconnect the source and connect the discharge path, probably controlled by some low frequency square wave, or figure in the discharge as continuous and just turn the source on and off.
 

Online Ian.M

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Re: Capacitor discharge timing with comparator
« Reply #2 on: May 07, 2017, 02:36:47 pm »
The circuit is rather suspicious - I cant think of any good reason to use a 1Meg resistor between the cap and the comparator pin.

Do you have sourcecode for the PIC?  If so it should be possible to build a behavioural SPICE model for it.  Post it or a link to it and we may be able to help further.
If not, you also need to scope the Vref pin to see what that's doing.
 

Offline IconicPCB

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Re: Capacitor discharge timing with comparator
« Reply #3 on: May 07, 2017, 08:28:21 pm »
The inverse of this circuit is the mainstay behind flying probe tester used in testing bare printed circuit boards.
By inverse i mean a current source is used used to charge and discharge a length of copper track o a PCB, Capacitance of the track is used as a measure of completeness of the track.
A signature is analysed in a number of scenarios to ensure completeness of track and then later used in subsequent measurement analysis.
Resolutions down to 50 femtofarads are realised. this is equivalent to a single pad say a couple of mm in diameter
 

Offline timb

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Re: Capacitor discharge timing with comparator
« Reply #4 on: May 07, 2017, 11:49:31 pm »
Here's how I rigged it up in iCircuit:



One comparator monitors when the capacitor reaches 5V then goes high, triggering a D Flip-Flop wired as a latch, which turns off the 5V switch to the capacitor and opens up a switch to the unknown resistor. When the voltage on the cap reaches 1V another comparator changes state. The whole contraption is fired by a timer (which would be in your MCU but is shown here as a 1kHz square wave).

The outputs of both comparators are fed into an AND gate, which outputs a clean pulse whose duration exactly matches the length of time the capacitor took to get from 5V to 1V. The MCU would
use a timer to measure how many clock cycles it stayed high and then do some math to convert it to microseconds.



Any sufficiently advanced technology is indistinguishable from magic; e.g., Cheez Whiz, Hot Dogs and RF.
 

Offline solarbotTopic starter

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Re: Capacitor discharge timing with comparator
« Reply #5 on: May 08, 2017, 02:16:01 pm »
Hi All,

Very cool - thanks for all the info, much appreciated.  I'm going get a copy of iCircuit and try this out to see if I can get it to match real world measurements :-)  I will report back.

Cheers
 

Offline solarbotTopic starter

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Re: Capacitor discharge timing with comparator
« Reply #6 on: May 08, 2017, 04:28:05 pm »
Hi timb,

I have now recreated your design in iCircuit, could I ask what settings you used for the two comparators and the timer please - I'm doing something wrong here  :-\
 

Offline danadak

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Re: Capacitor discharge timing with comparator
« Reply #7 on: May 08, 2017, 11:06:57 pm »
A question or two -

1) Range of C you want to measure ?
2) Resolution of the measurement ?
3) Accuracy of the measurement ?
4) Temp range of the instrument ?



Regards, Dana.
Love Cypress PSOC, ATTiny, Bit Slice, OpAmps, Oscilloscopes, and Analog Gurus like Pease, Miller, Widlar, Dobkin, obsessed with being an engineer
 

Offline solarbotTopic starter

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Re: Capacitor discharge timing with comparator
« Reply #8 on: May 09, 2017, 07:33:17 am »
Hi Dana,

I would like to measure unknown resistance in the range of 10K to 500M at temperatures ranging from about 5C to 30C.  Accuracy doesn't need to be spot on, maybe +/- 5-10%, I guess the resolution will decrease as the value increases so as a range across the measurement range might be something like: 100R to 1M?

Thanks for any thoughts - cheers.
 

Offline danadak

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Re: Capacitor discharge timing with comparator
« Reply #9 on: May 09, 2017, 10:59:23 am »
Misread what was to be measured.

Circuit has no shortage of error contributors -

1) Cpu clock accuracy
2) Capacitor leakage
3) Capacitor capacitance voltage dependence
4) Comparator input leakage
5) Interrupt or polling latency and repeat-ability
6) Tri-state pin leakage

Your challenges will be at the extremes, eg the 500 Mohm region
especially for sure. And guarding for leakage and pickup around the
comparator essential.


You would be wise to look at the error budget to get an idea of what
performance you can achieve.


Regards, Dana.
Love Cypress PSOC, ATTiny, Bit Slice, OpAmps, Oscilloscopes, and Analog Gurus like Pease, Miller, Widlar, Dobkin, obsessed with being an engineer
 

Online Ian.M

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Re: Capacitor discharge timing with comparator
« Reply #10 on: May 09, 2017, 11:29:38 am »
IIRC PIC input current leakage is usually specced as +/-1uA which, with two I/Os connected to the cap, could give you a 10% error at 100K and be essentially unusable above 1Meg.  Of course you may be lucky and get a PIC with particularly low leakage (say +/-0.1uA) and be able to push it to 10% error at 1Meg, but its pretty certain you wont be able to push it to 500Meg without using an external comparator with nA level leakage current and external low leakage controlled switches for charge and discharge, and even so the requirements for minimal  capacitor and board leakage are extreme.
 

Offline solarbotTopic starter

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Re: Capacitor discharge timing with comparator
« Reply #11 on: May 09, 2017, 05:08:31 pm »
Hi, thanks for the input.  At this stage I'm trying to replicate an existing simple design so that I understand how to experiment with it - thought I would start in a simulator and then build real circuits to gain the experience and find the edges :-)  I will draw out an update to what I think the circuit I have looks like and post it later.
 

Online Ian.M

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Re: Capacitor discharge timing with comparator
« Reply #12 on: May 09, 2017, 05:09:48 pm »
Got a link to the design you are reproducing? It looks a bit odd and it would be nice to be able to look at the source.
 

Offline solarbotTopic starter

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Re: Capacitor discharge timing with comparator
« Reply #13 on: May 09, 2017, 06:17:12 pm »
Hi, Unfortunately I don't have much info on the PCB circuit I'm looking at - no brand or other markings, single sided through hole - looks quite old school?

I think I've better traced out the circuit below and don't think a comparator is being used after all, despite the cut-off discharge voltage being a consistant 1V - perhaps the MCU is polling the voltage?  Unfortunatley I don't any documentation or code examples.

I'm pretty sure this is working by charging up the capacitor and timing how long a discharge to 1V takes but I could be wrong?
« Last Edit: May 09, 2017, 06:32:49 pm by solarbot »
 

Online Ian.M

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Re: Capacitor discharge timing with comparator
« Reply #14 on: May 09, 2017, 06:40:57 pm »
The odd bit is R3.  In series with R1, it forms a 250 Ohm resistor in parallel with the cap during the discharge phase, giving a RC time constant of 25us, but as the PIC internal oscillator speed is 4MHz (1 MIPS), that's only 125 instruction times for 5*RC, so it will seriously compromise the measurement resolution, and swamp the unknown resistor if its over about 30K.
 


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