So at the lowest level which among these can have the lowest feature size, diode, BJT, N Mosfet, P Mosfet. I mean in what order are the sizes of all these compos at the fabrication level?
That depends on the process (and I guess what you mean by feature size). Here's the layout for the smallest pmos, nmos, diode and pnp in a 65nm CMOS process.
This is simply amazing.
The PMOS and NMOS look similar sizes, the PMOS was supposed to be bigger right?
They're the same size. The minimum gate size for both is the same: L=60nm, W=120nm (but note the total area of the transistor is much bigger than this!) However, if you were making an inverter, due to the difference in carrier mobility, you might choose to make the PMOS bigger, to get similar rise/fall times, but you don't have to.
The diode seems to be bigger than the PMOS and NMOS, that was supposed to be the smallest.
It depends what you're actually measuring and how "good" a diode you want.
And what is PNP that looks quite big?
It's a vertical PNP BJT. It's a CMOS process, so the BJTs aren't great. If BJTs are what you're interested in, you need to look at BiCMOS or Bipolar process.