What to expect at a "VHDL workshop" at High School stem camp?

[buck converter]

I am attending a 2 week stem camp this summer. One of the workshops is titled "VHDL workshop". What should i expect from it? Would such a class focus on software or hardware, and would it be hands on? Will i touch a piece of hardware, or will it all simulated? I assume they are teaching it "no prior experience needed"

 I can tell from my research that VHDL is used to program FPGA. I saw Dave's video, very helpful.

[TimNJ]

I think it depends on how long the workshop is.

VHDL (and Verilog, basically the same thing) is a language that describes hardware. It is not a set of sequential instructions to be carried out like traditional software programming. It is just a formalized, relatively compact way to describe hardware. For example, you can implement an AND gate in VHDL by:

Code: [Select]

begin
  F <= A and B;
end func
When you synthesize this snippet of code on an FPGA, the compiler is going to "tell the FPGA" to physically (re)arrange its internal connections to make an AND gate. This is a real AND gate.

I would say you would most likely not synthesize your code in hardware since that takes a couple of extra steps, but who knows, maybe! Sometimes you run into problems synthesizing if you use non-synthesizeable (surprise) VHDL code. The non-synthesizeable code usually used to quickly test something in simulation, but there is no hardware equivalent.

[rstofer]

I would hope you actually get to download your FPGA configuration code (output of synthesizer/router) to real hardware.  Even if you only blink an LED, this part is as close to magic as you will ever see!

Have fun!

[Sweeney]

Considering that they are teaching "no prior experience needed" and that the course is only 2 weeks, I would hope they will at least cover some of the following subjects:

- binary system
- logic gates
- boolean algebra (in particular De Morgan's laws)
- truth tables
- karnaugh maps

If they drop you in at the deep end without covering any of the above first, it would be almost pointless.

I would expect that at the end of those two weeks, they will implement basic things like a parity checker or a ripple carry adder.

[hamster_nz]

I am attending a 2 week stem camp this summer. One of the workshops is titled "VHDL workshop". What should i expect from it? Would such a class focus on software or hardware, and would it be hands on? Will i touch a piece of hardware, or will it all simulated? I assume they are teaching it "no prior experience needed"

 I can tell from my research that VHDL is used to program FPGA. I saw Dave's video, very helpful.

I'm actually quite interested in hearing what you expect to get out of it, and what your present skills are, and what achievement would make you happy?

[JPortici]

i would expect it to be at least as good as the introductory course i attended at uni
-> what is an FPGA
-> what is VHDL
-> all that sweeney said (it was implied to be known to us)

-> how to install and battle with the IDE (quartus or whatever, depends on vendor)

-> bases of the syntax
-> basic building blocks (latches, adders, counters, ...)
-> finite state machines
-> simple programs using all of these

this much, i would have already been able to follow it during high school (tech school)

[rstofer]

If the entire 2 weeks is devoted to FPGAs, you could go a very long way.  I hadn't read the post with that in mind, I was thinking about an EE convention type thing where there are short presentations lasting well less than a day.

In 2 weeks you can get through all of the items that Sweeny and JPortici listed and then some.  In fact, given a suitable development board, I don't see why you couldn't implement an entire CPU.  No, it won't be a pipelined RISC machine or ARM processor but there are many small CPUs that could be implemented.

There are amazingly few structures that are implemented in VHDL.  The trick is using each structure in the proper place with the correct signals.  We have gates, obviously, and flops plus blocks such as registers, counters, decoders, encoders, priority trees and I have probably forgotten a couple.  These basic building blocks are interconnected to create the end project.  But once you know how to code these blocks, you use them over and over.

Finite State Machines (FSMs) are a little more complex and there are some real gotch'as in guaranteeing that every output is defined under all conditions but once you see how that is done, you won't forget.  I can't begin to tell you how many times I was caught in this trap.  Slow learner...

It could be a great class!  I want to go!  Alas, I'm too old...

[JPortici]

Finite State Machines (FSMs) are a little more complex and there are some real gotch'as in guaranteeing that every output is defined under all conditions but once you see how that is done, you won't forget.  I can't begin to tell you how many times I was caught in this trap.  Slow learner...

this, and then you start porting this way of thinking also in your programming (finite state machines for certain kinds of tasks, all possible states and events MUST be defined and not left to a strange bug in the future)

[buck converter]

Thank your for the advice!

[rstofer]

Thank your for the advice!

Are we going to get an 'after action' report?  I am truly looking forward to reading about your accomplishments in this class.  War stories and all!

[buck converter]

Will bring war stories, but camp does not start until July 24th!

[buck converter]

So today i walked by a dumpster in the hall way that had some EE books, probes and other cool junk that i would have snuck away with but it was not the right time. 5 minutes later it is gone.

[Rerouter]

Once an item is in a dumpster, previous claims of ownership are generally void, when you saw it was the right time

So how are those war stories coming along?

[RoGeorge]

I am attending a 2 week stem camp this summer. One of the workshops is titled "VHDL workshop". What should i expect from it? Would such a class focus on software or hardware, and would it be hands on? Will i touch a piece of hardware, or will it all simulated? I assume...

You know the saying, 'assumption is the mother of all mistakes'. Also, the definition for disappointment is 'wrong expectation'. Instead of assuming and expecting, better ask those question to the summer camp/workshop organizer.

Very good questions, by the way.
Have fun!

[buck converter]

War stories? No VHDL yet. Yesterday we toured the machine to see the 3d printers, but all what everyone was interested in was the boxes with THOUSANDS, of fidget spinners of all shapes sizes and colors.