So, I should have asked this in my original post, but when we're talking about Cstray, we're talking about the miniscule amount of capacitance that is present just between the traces and nearby ground traces and planes? Also known as parasitic capacitance?
More or less. Also the pads and crystal package itself.
Is there a way to estimate the stray capacitance?
I suspect no one bothers trying to estimate Cstray for a crystal oscillator; if frequency is really that critical then use an OCXO (Oven Controlled Xtal Oscillator). Cstray is usually low enough that you can just use the recommended load capacitance* for the crystal, or the next closest standard value down. If the crystal doesn't oscillate when the first board is built then you can tweak the load capacitor values, but that is rarely a problem.
I suppose a better question is, what is the consequence of selecting not the exactly right capacitor value?
Generally speaking, increasing the loading capacitance pulls the frequency down (NB - "pulling" is commonly used jargon for adjusting a crystal's frequency, usually by varying the load capacitance), until a point is reached which causes the crystal to either stop oscillating, or results in damage (fracture of the crystal). Decreasing the load capacitance pulls the frequency up, until a point is reached where the crystal stops oscillating. So clearly the consequences of too much loading capacitance are more severe than too little, but the range of "acceptable" capacitance can be surprisingly wide, particularly for crystals below, oh, 25MHz or so.
Which reminds me, crystals above 25MHz might use an overtone, rather than the fundamental, and these can be much more picky about the load capacitance. They also tend to be much less "pullable" as a result.
* - or twice the load capacitance for each capacitor, if there are capacitors to ground on either side of the crystal.