CIRC code generation (CDROM)

[Allegas]

Hey everyone!
I am currently thinking over a low-level cdrom optical pickup emulator (fpga+arm). I took a look at ECMA-130 doc, there is a diagram of byte interleaving. The main problem - I do not understand what "delay of two symbols" means, as well as "D-4 delay lines" and "delay of 1 symbol", mainly because of my poor english skills. Do these delay lines mean, that I must take "delayed" bytes from following F1 frames? And what about last 98th frame, which has no following frames?
A simple explanaition would be just great. 

[helius]

As best as I can understand it, each box containing "tD" means that it represents a t-stage shift register, in which each signal that enters, comes out t cycles later. You do need to know how the registers are initialized by a reset, which should be specified somewhere in the document. I don't know what the small "D-4" under the unequal delay section means: maybe "D" is itself variable, so the length of delay changes based on the frame's position in the sector?

Do these delay lines mean, that I must take "delayed" bytes from following F1 frames?

Contrariwise, the symbols which pass through the delay line are used by later frames, which mean they must come from earlier frames than the one being encoded. This is made clear by the penultimate column of the chart, which shows the word of the audio data from which each byte of the sector derives. For example, byte 18 says "W12n+6-12(18D+1),A", which tells you that it comes from "W12n+6,A", which derives from the input word "L6n+3", after being delayed by "18D+1" frames.
Note that there is an obvious typo in the chart: the last four rows should say "/P12n-12", etc.

And what about last 98th frame, which has no following frames?

This should also be explained in the document. Either the registers are reset, throwing away the symbols in the pipeline, or they continue to flow into the next sector.

[Allegas]

Contrariwise, the symbols which pass through the delay line are used by later frames, which mean they must come from earlier frames than the one being encoded. This is made clear by the penultimate column of the chart, which shows the word of the audio data from which each byte of the sector derives. For example, byte 18 says "W12n+6-12(18D+1),A", which tells you that it comes from "W12n+6,A", which derives from the input word "L6n+3", after being delayed by "18D+1" frames.
Note that there is an obvious typo in the chart: the last four rows should say "/P12n-12", etc.

Oh, never thought about these numbers in this way. Now I understand the meaning of numbers at C2 encoder, thank you!
So far, I do not understand : how W12n-24A corresponds with W12n-12(3), exactly what is D and what is the meaning of numbers between brackets.

[helius]

there are 12 words of PCM in each frame (24 bytes), so "W12n" means that the same part of the generator is used for W0, W12, W24, etc in the audio stream (all natural numbers of n). "W12n-12(3)" means that the value comes from a word that is in the third previous frame (12 words per frame, times 3 frames previous).