confusion about pull down resistors

[engineheat]

I get the idea behind pull up resistors. You want the pull up resistance to be much smaller than the input impedance of the pin, so that with voltage division, you'd still have an input voltage close to 5V at the pin input.

Here's how I understand it, X marks the voltage at the pin input

5V ----pull up resistance ----- X ------- input impedance ----

I'm a little unclear on pull down resistance, specifically how large the value should be. One source says pull down resistance should be much larger than input impedance, like this one:

http://www.resistorguide.com/pull-up-resistor_pull-down-resistor/
but the reason they gave is not intuitive.

Another source talked about current sinking/sourcing at the pin, which confused me. Other sources like Sparkfun only glossed over pull down.

Please advise on the appropriate value for pull down resistor, and briefly explain why.

Thanks

[rstofer]

I can see why you are confused, the web page is just wrong.  There is a solid Vdd going to the pin when the switch is closed and the resistor value doesn't matter assuming you don't overload the power supply and there is NO chance of that with CMOS where the pin current is negligible and the only current is through the resistor.

This is fine for CMOS but, again, TTL is a different story.  The resistor needs to sink the pin current and still hold the pin below the threshold.  That takes a low value resistor and, for that reason, pull-down isn't usually used for TTL.  Nobody is using TTL so I'm not going to show the math.

Given that the CMOS current is negligible, the only current flowing through the switch goes through the resistor.  It still needs to be high enough to make the switch reliable.  I prefer a low value like 1k.

[David Hess]

CMOS has essentially an infinite input resistance so the pull-down or pull-up resistance is limited by capacitance and how fast the rise or fall time needs to be.

TTL has an asymmetrical current driven input so its pull-up resistance is high and may be limited by capacitance but its pull-down resistance if used has to be very low.  Some of the last TTL families built on complementary bipolar processes had PNP inputs reducing the pull down current considerably but really it was never a problem.

[Zero999]

Check out the following thread:
https://www.eevblog.com/forum/beginners/trying-to-understand-a-pull-up-resistor/msg1407317/#msg1407317

[danadak]

Pulldown R's often used to absorb leakage in CMOS designs, to prevent
an input or external transistor from turning on when driving pin is tri-
stated.

Examples of UP's driving external power switches -







Regards, Dana.