Author Topic: Differential Amplifier - Differential Mode  (Read 1927 times)

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Offline EEMTopic starter

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Differential Amplifier - Differential Mode
« on: June 26, 2016, 05:07:56 am »
Hello, I am hoping someone could help me with part B of this problem. I am not sure of the effects the resistor would have on the differential output gain.
Also I have attached my solution to part A but I am uncertain if I derived it correctly.

Any help would be appreciated !
 

Offline T3sl4co1l

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Re: Differential Amplifier - Differential Mode
« Reply #1 on: June 26, 2016, 05:26:39 am »
b. A resistor between outputs acts in parallel with (Rc + Rc), so reduces gain by that amount.  No effect on CM.

Tim
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Offline EEMTopic starter

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Re: Differential Amplifier - Differential Mode
« Reply #2 on: June 26, 2016, 07:29:28 pm »
Thanks Tim !

I've attached my proof for b. Does this look OK ?
Also, I thought the added resistor would affect Vo1, so why would there be no effect on CM gain ?
 

Offline Marco

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Re: Differential Amplifier - Differential Mode
« Reply #3 on: June 26, 2016, 07:38:10 pm »
b. A resistor between outputs acts in parallel with (Rc + Rc), so reduces gain by that amount.  No effect on CM.

With common mode gain they mean the gain for a single ended output (not the differential gain with transistor mismatch as is common).  Because of Ree this will change.
« Last Edit: June 26, 2016, 07:43:09 pm by Marco »
 

Offline T3sl4co1l

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Re: Differential Amplifier - Differential Mode
« Reply #4 on: June 26, 2016, 07:39:15 pm »
Hmm, it should be 3, not 4.

What is the definition of differential output voltage?  Common mode?

Tim
Seven Transistor Labs, LLC
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Offline TimFox

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Re: Differential Amplifier - Differential Mode
« Reply #5 on: June 26, 2016, 07:49:03 pm »
delta[Vout(diff)] = delta [Vout(1) - Vout(2)]
delta[Vout(cm)] = (1/2) x delta[(Vout1 + Vout2)]
 

Offline LvW

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Re: Differential Amplifier - Differential Mode
« Reply #6 on: June 27, 2016, 09:12:52 am »
I've attached my proof for b. Does this look OK ?
No - it doesn`t.
You have forgotten that the third (new) resistor is not at signal ground at one leg.
 


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