Does this PCB layout look ok?

[MakuseruSukotto]

Hey guys, was just wanting some opinions on this layout I did.

Placement, trace width, clearances, etc. What I'm most uncomfortable with are the ground and power pours, I'd never done anything with them before, read a few different tutorials online and went from there. The board was autorouted, with some hand tweaking to try to get more coverage on the pours. Ran it through OSH Park's DRU and it passed with no errors.

What could I tweak or improve on this before I get it made?







Thanks guys!

[Godzil]

It's my 2 cents, but I would says that you should check the clearance for the flood fill, it seems really small around the pads, and there are really a lot of trap for young electron to fall with all you right angled tracks that could be easily avoided!!!


Apart from that for me as a non expert PCB designer my only visual concern would be the clearance on the floodfill and that some track exit some pads in a way I don't visually like (it will not change the behaviour of the PCB, it's just a design OCD )




(sorry for the stupid joke about the young electron, I've just watch a bunch of Dave's video and mixed a bit everything of his catch phrases )

[MakuseruSukotto]

It's my 2 cents, but I would says that you should check the clearance for the flood fill, it seems really small around the pads, and there are really a lot of trap for young electron to fall with all you right angled tracks that could be easily avoided!!!


Apart from that for me as a non expert PCB designer my only visual concern would be the clearance on the floodfill and that some track exit some pads in a way I don't visually like (it will not change the behaviour of the PCB, it's just a design OCD )



(sorry for the stupid joke about the young electron, I've just watch a bunch of Dave's video and mixed a bit everything of his catch phrases )

I thought that might be an issue with the fills, just wasn't 100% sure since fills are so new to me. Neither of the guides I was following mentioned actual clearances for the fills, could you recommend a value?

And are you saying to try and avoid right angles on the traces?

[owiecc]

Some pads are small. If you are going go to solder wires to the board (e.g. for potentiometers) these pads will not be the easiest to solder.
If pots are to be soldered on a wire put a space for a three pin connector (http://www.ebay.com/itm/2510-2-54mm-3-Pin-Male-Female-Connector-Plug-and-crimps-x-10-sets-/181810648230?pt=LH_DefaultDomain_0&hash=item2a54c254a6)
Make all passive component pads the same size (not needed but it will look better)
Put designators outside the components so you can see them after soldering (Q1, IC1)
Put GND, S1, S2, 5V on a single goldpin connector (100mil spacing).
Add some 3mm mounting holes in the corners.

If you want the board to look super pro (in the 80's terms ) you can put all component pads on 100mil grid:
http://www.oldcrows.net/~oldcrow/synth/korg/polysix/crowlm367/klm367a_img.gif
http://ontheslipway.com/?p=2263
This way you will probably save some space.

And turn off the autorouter. Play yourself. You will be able to get better results easily. I think with some fiddling you should get this board to fit on a single layer. This will be easier to solder and you can easily make it yourself, at home, if you want.

[Godzil]

Arg I've love the whole post I was going to submit

I was going to say that right angle is much more a problem of taste than a real problem, unless your design will run at (really) high frequency where it could start to cause problems.

And as owiecc says, your board is not that complex, keep this design in case of, but try to route it yourself, you will find it more rewarding, and it will be 100% at your taste

For the floodfill, use at the bare minimum the same clearance as for tracks and pads clearance, I tend to put a bit more on my designs.

[MakuseruSukotto]

It certainly can fit on one side, but since I'm not making it myself I figured I might as well take advantage of using both sides, since everything was just too tight for my liking single sided.

I'm going to beef up some of those pads, change the clearance on the fills, and see if I can hammer out those right angles. It's not HF, but if it's generally a no-no, I'd rather not get into the habit of doing it.

[Neganur]

avoid routing unrelated traces directly under the crystal

[T3sl4co1l]

7 mil minimum clearance and trace width is a pretty typical or slightly conservative figure.

Stitch the ground pour with vias, and I think you'll probably be pretty golden.  The trace routing doesn't jump out at me as being overly ugly or anything...

Tim

[alexanderbrevig]

Already mentioned is to not have tracks close to the crystal (though it will probably not matter for your design as it seems to be an offset/start for the pot).

While on the topic of the clock I'd also want to make the traces in the same length approximately. Again, it probably won't affect your design, but it's a good practice.
Like this:


Also, if this is an educational project I would recommend to try and create a SMD version too. Start with 0805 if you're "scared", I promise you that it will be worth it. I was very hesitant my first go, but it's easier than through hole when you get the hang of it!

[tautech]

Hey guys, was just wanting some opinions on this layout I did.

Typical gawd awful autorouter, but very useful for TRIAL routing, then you clean up the mess.

Keep all passing traces away from pads.
Autorouter shortest path is not always the best. eg DIP IC, take the trace up the middle and out the top.
IC's pin 1 pad make as a rectangle.
Diode and LED cathode and polarised caps positive pads make as a square.

[homebrew]

Additionally you could rotate the Crystal and its associated capacitors by 90 degrees. That would allow you to have the two crystal connections to be of equal length (not really important, just looks nicer) and very short. I would also suggest putting the connections to the capacitors as close to the crystal as possible.

[Tac Eht Xilef]

Additionally you could rotate the Crystal and its associated capacitors by 90 degrees. That would allow you to have the two crystal connections to be of equal length (not really important, just looks nicer) and very short. I would also suggest putting the connections to the capacitors as close to the crystal as possible.

And a bunch of similar little things - for example, rotating R1/R2/R12 by 180 degrees & moving D1 from the left to the right of R1/R2 would make the routing on that part of the board easier/neater. I'd also probably re-arrange the whole RH side of the board with the same sort of thing in mind, but exactly how would depend on the type of signals involved.

Stitch the ground pour with vias, and I think you'll probably be pretty golden.

Careful - it appears that the top pour is 5v and the bottom pour is ground... not exactly wrong, but on a simple DS TH board I'd need a specific reason for doing it that way.

[tautech]

Just noticed D1 and the resistors all show leads on both sides of the PCB. 

Could the component properties be wrong for these passives? 

I'd be editing the bottom overlay to just show "---D1---" between pads.

[matseng]

For the floodfill, use at the bare minimum the same clearance as for tracks and pads clearance, I tend to put a bit more on my designs.

This is a thing that I see frequently.  Why is so many obsessed with the floodfill distances? If 8 or 6 mil distance is just fine for signal tracks,even in long buses with 8 or 16 tracks are parallel, why would it all of a sudden become a problem when a track is next to (gnd) fill?

[T3sl4co1l]

I don't worry about crystals.  The circuit impedance is actually very high (~1kohm), so in principle, placing a lot of copper near them (ground or otherwise) is undesirable -- that lowers the transmission line impedance of the traces.  But the frequency is quite low (10s of MHz), so trace lengths (and length mismatches) up to fractional meters are immaterial.  Noise sensitivity is probably a priority, so avoid running other traces nearby or directly underneath.

Tim

[rs20]

This is a thing that I see frequently.  Why is so many obsessed with the floodfill distances? If 8 or 6 mil distance is just fine for signal tracks,even in long buses with 8 or 16 tracks are parallel, why would it all of a sudden become a problem when a track is next to (gnd) fill?

Think about it, if you set a net clearance to 8 mil, then there's a good chance that no nets will come within 8 mil -- the ones that are 7.9 mil get rejected by your PCB software so you re-route them until they're 8.1 mil away. And even then, that proximity will only be in extremely tight patches.

Contrast this to an 8 mil flood fill, where you now have this clearance of 8.00 mil along the side of almost every track and pad. Even though it's the same number, the amount of real proximity that arises is hugely greater. The end result is that the flood fill is closer to the traces than almost all the other traces, which is just dumb.

Put another way, if you're working with a 0.65mm or less pitch package, you have to set your clearances quite small, but it's only that close near that chip. If you set your floodfill to the same clearances, you get floodfills sneaking up the ground lines and looking ugly, you get dumb little crescents where the floodfill under the chip is trying to sneak in between the pads, etc. It just looks crap, and it also promotes the possibility of bits of copper reaching out under solder masks and maybe even short-circuiting. Having the flood fill distance set to the same as the net distance can't be beneficial, and it can cause problems.

[T3sl4co1l]

Clearance isn't a local problem, it's a global problem.  Board houses require that your clearances be several times their minimum feature size, so that if they have poor resolution in any one spot, there will be no locations on your board that get shorted.

It's a statistical thing.  If their process can resolve 1 mil with 1 sigma error, that's pretty bad for traces spaced so closely.  But at 5 mil, it gets very good, parts-per-million good.  But there are quite many traces and gaps on the board as well, so that there might be thousands of such trials; widening it to 7 or 8 mil ensures that even those will remain clear.  In addition, you have quite good confidence that the voltage rating of those gaps will meet the minimum requirements for your design (functional insulation), or for safety purposes (UL/CE rated).

The most common failure I've seen, in board fabrication, is a very different kind of error: rather than a normally distributed error in the print, the most common seems to be relatively large (~mm) blemishes, presumably dust/contamination, or smears in the photographic process.  There might be only a few such events per panel, and if one happens to span between traces, that board must be rejected.  (If it happens to be over an open area, they might leave it, or scrape off the extra copper.  If it happens over a filled area, no one's the wiser because it's already filled.)

Tim

[Godzil]

My reason for using a value a bit higher than track/pad clearance is because of potential fabrications problem, but also because of that goofy problem that Dave had long time ago:

[matseng]

So what both of you really are saying that is just a statistical/safety thing, add a little extra safety factor in case the fab doesn't deliver what they promise? This sounds both like good advice and a lot of waving of chicken bones in the air while praying to the moon while it's at the right phase.

The issue of getting long thin ugly slivers of fills sounds reasonable from a uglyness standpoint and maybe it will cause some antenna/stub concerns.

But would you also then route long wide buses at 8/10  because you don't trust the fab to do the 8/8 they say they can do?

Isn't this exactly why the fabs underspec what they really can do? And also isn't this why you have 100% e-test? If the fab gets a low yield when someone is designing according to their specs is would be their problem, not the customers.

[rs20]

So what both of you really are saying that is just a statistical/safety thing, add a little extra safety factor in case the fab doesn't deliver what they promise? This sounds both like good advice and a lot of waving of chicken bones in the air while praying to the moon while it's at the right phase.

Honestly it's also largely an aesthetic thing. But look at the OP's board, there's plenty of space between the traces, and then the ground fill goes right to within a hair's breadth of those traces. Why have it that way? Let's flip the question around, why are you so "obsessed" with having your fill distance being the same as the distance between nets? "I just left the PCB software on its defaults" is not a remotely acceptable answer.

[Godzil]

But would you also then route long wide buses at 8/10  because you don't trust the fab to do the 8/8 they say they can do?

You can have a lots of surprises, so it's better to be more secure than less, especially when it does not make your design more difficult. Dave is a highly experienced EE, but he still sometimes get strange results that are not what he expect, look I the episode #155 I posted earlier.
For unknown reason (like the operator did some strange stuff on your Gerber what happen on Dave design) or just because there are some tolerances in the fabrication process, you must be careful on what you are doing, and being more careful than needed is honestly a better approach.

Building PCB is costly, even on low cost solution, and if you build 10 PCB and 10 of them are just bad enough to be trashed, aren't you wasting money?

[HugoPT]

You should also adopt some hole in the corners to maybe attach a screw in a case in future or any way you could hold the board in place where you install it.

[Circlotron]

C2 and C3 both go to the plane on the blue side, yet they are joined by a track on the red side. Doesn't make sense.