Author Topic: ESD protection on-chip or off-chip  (Read 3087 times)

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Offline derGoldsteinTopic starter

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ESD protection on-chip or off-chip
« on: February 26, 2017, 01:44:08 pm »
I've been looking at ESD protection of various communication chips, like this:
http://www.electronicproducts.com/Passive_Components/Circuit_Protection/Circuit_protection_of_IP-networked_security_camera_systems.aspx

They usually have dedicated ESD protection chips close to the physical connector. But then when I check out the datasheet for ICs down the line, and they also have internal ESD protection:
http://www.ti.com/lit/ds/symlink/dp83822if.pdf
http://www.ti.com/lit/ds/symlink/sn75dp130.pdf
http://www.ti.com/lit/ds/symlink/sn75lvcp601.pdf

Is this redundancy necessary? Does the dedicated ESD protection chip located next to the connector doing something different than the one on the communication IC?
 

Offline amitchell

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Re: ESD protection on-chip or off-chip
« Reply #1 on: February 26, 2017, 09:24:51 pm »
It depends on the ESD rating, some chips such as the 2nd link your provided have a 2000V Human body model ESD rating which basically just covers handling during manufacturing. In that case I would add ESD protection if you needed user protection.

The first chip has IEC 61000-4-2 8000V protection on the Ethernet pins, and that may be all you need for that one.

TVS diodes are inexpensive. If your board/product is costly or mission critical, whats the harm of adding secondary protection assuming signal integrity is maintained?
 

Offline derGoldsteinTopic starter

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Re: ESD protection on-chip or off-chip
« Reply #2 on: February 26, 2017, 09:47:53 pm »
TVS diodes are inexpensive. If your board/product is costly or mission critical, whats the harm of adding secondary protection assuming signal integrity is maintained?

From a cost perspective it seems like a no-brainer, I'm just wondering if there's a physical reason for it. If the ESD protection chips being placed near the socket has to do with preventing a wayward discharge "climbing upstream" to the more delicate circuitry.

Just being relatively cheap isn't (on its own) a justification to add another line to the BOM and another reel to the pick-and-place machine.
 

Offline amitchell

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Re: ESD protection on-chip or off-chip
« Reply #3 on: February 26, 2017, 10:26:34 pm »
They should be placed where you anticipate the strike to occur in most cases connectors/switches/LEDs accessible to the outside world. Strikes can couple to nearby traces so its in your best interest to place protection devices as close to the strike point as possible.

http://www.ti.com/lit/an/slva680/slva680.pdf


TVS diodes are inexpensive. If your board/product is costly or mission critical, whats the harm of adding secondary protection assuming signal integrity is maintained?

From a cost perspective it seems like a no-brainer, I'm just wondering if there's a physical reason for it. If the ESD protection chips being placed near the socket has to do with preventing a wayward discharge "climbing upstream" to the more delicate circuitry.

Just being relatively cheap isn't (on its own) a justification to add another line to the BOM and another reel to the pick-and-place machine.
 
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Offline Benta

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Re: ESD protection on-chip or off-chip
« Reply #4 on: February 26, 2017, 11:00:42 pm »
Quote
From a cost perspective it seems like a no-brainer, I'm just wondering if there's a physical reason for it.

Yes, there is a reason for it (disclaimer: I've only looked at the first datasheet).
The first two ESD specifications only deal with handling. The third is weak. And taken together with the Absolute Maximum Ratings... well...

The IC is designed in sub-micron technology, and the protection diodes are no different and will only be able to dissipate a small amount of power.
External TVS diodes will tolerate high current/power and absorb it without flinching, and will prevent local substrate overheating in the IC.
 
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Offline derGoldsteinTopic starter

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Re: ESD protection on-chip or off-chip
« Reply #5 on: February 26, 2017, 11:44:54 pm »
They should be placed where you anticipate the strike to occur in most cases connectors/switches/LEDs accessible to the outside world. Strikes can couple to nearby traces so its in your best interest to place protection devices as close to the strike point as possible.
http://www.ti.com/lit/an/slva680/slva680.pdf

That's a good document, especially about how laying traces can effect/amplify EMI.

Yes, there is a reason for it (disclaimer: I've only looked at the first datasheet).
The first two ESD specifications only deal with handling. The third is weak. And taken together with the Absolute Maximum Ratings... well...

The IC is designed in sub-micron technology, and the protection diodes are no different and will only be able to dissipate a small amount of power.
External TVS diodes will tolerate high current/power and absorb it without flinching, and will prevent local substrate overheating in the IC.

Thanks!

I keep thinking of electrical current as instantaneous because in digital electronics it's discouraged (or at least *I* was discouraged) to think of it as "flow". That document makes it clear that I have to think of the path the discharge takes on the PCB and what it encounters first. Figure 7 especially shows that you need to place the TVS diodes in the path that the discharge is expected to take.
So really the on-chip/IC diodes are only meant to help the chip "arrive safely" on the PCB. I think I saw some datasheets specifically saying that the ESD protection was on the data lines, but I assume that those are there to catch discharges that originate within the PCB itself due to high-frequencies.
 

Offline T3sl4co1l

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Re: ESD protection on-chip or off-chip
« Reply #6 on: February 27, 2017, 08:19:28 am »
Most chips offer 2kV HBM ESD protection.  This is a far cry from the 15kV often seen on a dry day from people shuffling past: over 50 times more energy!

Some chips go above and beyond to offer good ESD protection.  Many bus interface devices offer this: RS-232, RS-422/485, CAN, etc.

Some can't, by their nature: USB Full Speed communication is basically logic level, and easily protected, but High Speed requires low losses at high frequency, which limits how big of a diode (due to capacitance) you can connect to it.

There are solutions for these applications too, but they get more and more iffy as bandwidth and capability get stretched.  A TVS diode for protecting USB HS (which is really a couple very small clamp diodes, and one large zener diode) might survive ten strikes at full voltage, but not a hundred, or a million.  Whereas the slower comms (like RS-232) can use big fat avalanche diodes straightaway, that will survive not only the biggest ESD you can possibly muster, but EFT (rapid-fire bursts of pulses similar to ESD, at somewhat lower voltage), and surge as well.

Surge, by the way, is mainly related to lightning.  Suppose you have a comm signal, unshielded twisted pair, snaking through a wood-frame building.  Lightning strikes nearby.  The 100kA surge of that lightning induces considerable voltage in nearby wiring, and by "nearby" I mean less than a kilometer from the strike (obviously, being stronger when closer).  It also causes voltage drop across the ground (and by ground, I mean planet Earth ground!).  Both induce some pretty nasty voltages, in any wire that covers a modest distance without shielding, or connects between distant equipment (that's not grounded in the same place).

Needless to say, extreme steps must be taken to convey high bandwidth signals: Ethernet is the gold standard of EMC design.  It is transformer coupled, to prevent problems with ground loop and surge, and differential (with common mode filtering and bypass capacitance) to provide immunity to ambient RF, and ESD and EFT pulses.

Such steps may not be applicable for your application, but the more of these steps you can employ, the better it will be. :)

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 
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Offline Ice-Tea

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Re: ESD protection on-chip or off-chip
« Reply #7 on: February 27, 2017, 08:31:33 am »
Something not often mentioned: external diodes sometimes only serve as a peace-of-mind device: "oh, yeah, I'm fully protected now!". Problem is the internal protection devices, who are, well, there. If their trigger voltage is a wee bit lower than the external ones, they may burn through before the external one even notices.
 
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Offline T3sl4co1l

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Re: ESD protection on-chip or off-chip
« Reply #8 on: February 27, 2017, 09:54:54 am »
One must design ESD protection properly, of course; chucking diodes at a design, without consideration, will not lead to success. :)

Even for robust devices, it can be better to use external diodes.  ESD protection is often designed with a latching SCR or snap-back structure, which shuts down the whole chip.  (Often, there is one tough clamping structure, supplied with diodes from all pins.  Hence, when it gets turned on, all pins get pulled down.  Saves the chip, but screws up whatever you were doing.)

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 
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