Exclusive double switch circuit

[waspinator]

Hi,

I'm trying to control two outputs from two inputs, but I want to make sure only one output is on at a time. What are some options for circuits I could use? If needed I could add a third input.

Thanks

Code: [Select]

INA INB  |  OUTA OUTB
---------------------
 0   0   |    0    0
 0   1   |    0    1
 1   0   |    1    0
 1   1   |    0    0

[Nusa]

Hi,

I'm trying to control two outputs from two inputs, but I want to make sure only one output is on at a time. What are some options for circuits I could use? If needed I could add a third input.

Thanks

Code: [Select]

INA INB  |  OUTA OUTB
---------------------
 0   0   |    0    0
 0   1   |    0    1
 1   0   |    1    0
 1   1   |    0    0

Just implement your logic table.
OutA = InA & not(InB)
OutB = InB & not(InA)

[Benta]

The simplest way is to use an open-collector 2:4 line demultiplexer, eg, SN74ALS156. You can do it with gates as well, but I haven't checked whether you can pack it into one device.

[Nusa]

Quad NAND gate IC would work, using two of the NAND's as inverters.

[Zero999]

This depends on what the original poster's requirements are. The simplest way I can think of is two DPDT switches. The first contacts connected like a two way light switch and the second set on each switch in series with the load. See the link below and work it out for yourself.

http://www.lightwiring.co.uk/two-way-switching-3-wire-system-new-harmonised-cable-colours/

[waspinator]

Okay, so something like this?

[Benta]

Yup, should work.

[waspinator]

looks like my NAND version is actually

Code: [Select]

INA INB  |  OUTA OUTB
---------------------
 0   0   |    1    1
 0   1   |    0    1
 1   0   |    1    0
 1   1   |    1    1
Is there a way to do this with just 4 NANDs?

[rstofer]

Applying DeMorgan's Theorem to NAND gates leads to the idea that the gates closest to the output work as OR gates and the next layer back work as AND gates.  Signals that enter at odd layers are inverted.  So, no, you probably can't get there with 4 NAND gates.  Try to implement A*B + C*D with (3) 2-input NAND gates and you'll see what I mean.

OTOH, the output of NOR gates closest to the output work as AND gates and the gates one level back work as OR gates.  Signals that enter at odd layers are again inverted.  Try to implement (A+B) * (C+D) with (3) 2-input NOR gates.

For your project, the following should work:

Output 1 = NOR( A, NOR( B, B)) -> B AND (NOT A)
Output 2 = NOR( B, NOR( A, A)) -> A AND (NOT B)

Look at the first equation.  Notice that A is entering at the output NOR gate, an odd level.  Hence it is inverted.  The first level NOR is still working as an AND gate and NOT B is the other input.  So, that NOT B is inverted at the output to become B and the final equation is B AND NOT A.

[Nusa]

What he said....4 NOR gates instead of 4 NAND gates like I said above, unless inverted outputs is actually useful to you.

Demorgans Theorem can be shown visually as well as mathematically, by changing the type between AND and OR and moving the inverting symbols to the other side. This sometimes makes it easier to understand, especially if you organize it so inverting symbols cancel each other:

[rstofer]

I like that alternate representation of the NOR as an AND with inverted inputs.  Clever!

[Zero999]

Two DPDT switches.