FET Switch On by default

[fagiano]

Hi, I'm trying to make a N-Channel switch that is fully "On" by default and that I can optionally turned off with a 3.3V MCU. The attached circuit is what I came out with so far. I was wondering if it makes any sense(the simulation seems to work). Am I starting to understand something or there is another obvious way?

thank you for your time

ciao
Alberto

[AndyC_772]

I'm not sure I see the need for the complexity. If it's under software control, ie. the gate is driven by the MCU, then it's your software that needs to drive the gate pin high 'by default', not the hardware.

It gets a bit more complicated if you want several different signals to all be able to control the FET in some way. You could, for example, put a pull-up resistor between the gate and the positive supply, and then connect a diode between the gate and each signal which needs to be able to pull the gate low. With this arrangement, the gate is high 'by default', but if any of the drive signals are low then the gate will be pulled to within a diode drop of ground. Use a Schottky diode and the FET is virtually guaranteed to be fully off.

[fagiano]

Thank you for the reply, I only need a single signal to turn off the FET, is more an optimization than a necessity. I'm going for the "on by default" because I might use the same board without an MCU, in that case it should be always on. Also, this is driving a cooling pump so if the MCU power is yanked away by my cleaner or it bursts into flames it should turn on.

I'm don't think I understand the diode suggestion  (I'm thinking about it ).



ciao
Alberto

[AndyC_772]

OK - in that case, just fit a pull-up resistor between the gate and the MCU supply voltage (presumably 3.3 or 5V).

If the MCU isn't there, the FET gets turned on, otherwise it's under software control. Make sure your software drives the output high and you're done.

The circuit you have is absolutely fine, by the way. It's keeping the +12V supply a bit further away from the MCU, and ensures that the FET gate is pulled up to +12V rather than just +3.3 or +5V. This may help keep its resistance to a minimum, depending on which FET you use and how its Rds(on) varies with Vgs.

[fagiano]

Cool, I have to test the resistance of the FET a 3.3v but your solution is much simpler than mine, thank you! I'm also happy that my circuit is not completely hopeless, I have no formal education so even simple analog stuff makes very insecure.

thank you again

ciao
Alberto

[fcb]

I don't see anything wrong with what you've proposed - but probably also add a pulldown on the base of the transistor, as you won't need much current to et that transistor conducting enough to pull-down the 1M.

Just make sure that when the micro boots up it keeps the port pin as an input or sets it to output and makes sure it's low (easy to do in PIC).

[fagiano]

Yep, I might have to stick on my solution as with 3.3V the Rds is still pretty high for 4A+ of current.

add a pulldown on the base of the transistor, as you won't need much current to et that transistor conducting enough to pull-down the 1M

dho! that makes sense, how much would be a safe value? between 47k and 100k, the simulation still works

thank you all

ciao
Alberto