Few questions AT89C55WD, variant of 8051

[Vindhyachal.takniki]

I am using AT89C55WD, 40 pin DIP, in one of my project.
I have connected 12Mhz crystal. It is 8051 variant. So inst time is 1us.
Using Keil v4.72.9.0 & C compiler V9.50.0.0


1. How to invert a bit? Is below is the correct way:
or is there any single cycle invert in it like setb & clr
    if(1U == P2^3)
    {
        P2^3 = 0U;
    }   
    else
    {
        P2^3 = 1U;
    }   

   
2. I am programming in C. In one place I have use _nop_().When I saw its reference it showed in Keil folder file "intrins.h".
But there it has reference only "extern void  _nop_ (void);"   
There is no definition.
I know it will something like "asm(Nop)".
But I want to know like if function definition is not present in project folder & only it has project reference, then how do code builds?


3. How to determine what's the max stack size code touch in it.
I am using almost all RAM in it. I am afraid if any point stack overflow? How to determine this is not the case.

4. Interrupt nesting:
I am using two timers interrupts in it. One at 100us time & other at 20ms time.
100us timer is turned on when it is required otherwise it is off.
20ms timer is on continuously, do some task in it, inside isr it may take max 500us.
In programming I have priority of 100us highest since it is generating some signal on bit.
I think problem may occur if 20ms timer is getting executed, since there is no nesting in 89c55, so it may miss 100us interrupt.
I dont want to miss 100us timer in any case.
What is the solution in this case.
I think only solution is to disable 20ms timer.

[Vindhyachal.takniki]

1. Inverting a bit. This works best & in single cycle too.

       sbit pump_out      =  P2^3;
       
      pump_out = !pump_out;

Assembly out in keil
      C:0x000F    B2A3     CPL      pump_out(0xA0.3)


2. Is there anything special to do interrupt nesting like any keyword to add.
I have two interrupts one is 20ms & other is 100us.
100us interrupt timer has higher priority.
Suppose if 20ms timer isr is getting processed, if 100us timer isr comes in between will compiler will then go to 100us & comes back to serve 20ms isr?

3. Do companies still manufacture AT89C51 - 40pin DIP ?

[Vindhyachal.takniki]

1. Checked that higher priority interrupt can interrupt lower priority one in between, by below code. Pin gets inverted every 100us:
volatile uint8_t x;
void isr_higher_priority(void)
{
if(1 == x)
{
invert_pin();
}
}
void isr_lowerpriority(void)
{
x = 1;
do some task
x = 0;
}
First time I have used Keil's Logic analyzer, performance analyzer.
They are really powerful tools.
 
 
2. Which company still manufcture AT89C51 - 40pin dip with 4kb flash & 128 bytes ram.
Atmel wesite shows it has 32Mhz AT89C51RC. But in market I have seen lots of new AT89C51

[danadak]

Have you looked at Cypress PSOC 3 family. They have a number
of videos on tool, it uses Keil for compiler, is 8051 core.

http://www.cypress.com/products/psoc-3

Tons of analog capability, many digital blocks including DSP,
DAC, A/D........

http://www.cypress.com/products/cy8c38xxx

http://www.cypress.com/training-on-demand/psoc-3-and-psoc-5-101-introduction-architecture-and-design-flow

Plus they have same parts with ARM cores when you are ready to move on to a high performance core.

They all have a logic fabric that can be programmed in Verilog alongside the normal C coding.

And routability.

List of modules (part dependent, but many common to all) attached.

Regards, Dana.