Well, what does the process consist of?
If you amplify the signal a variable amount, and compare to a fixed threshold, and do some other processing from that (i.e., inverting the input and subtracting an offset), then you have to keep track of each offset, for each fold.
Which means you can't use one single stage, single state device to do it. You need N states for N folds.
A comparison is an analog-to-digital conversion. If a single converter is one bit, then.. it stands to reason, we need a lg(N) bit ADC to provide those N states, a register to hold them, and a DAC to spit out the quantized values.
The general solution would be:
Input --> Gain --> ADC --> DAC --> Mixer --> Switched inverter
the Gain output also goes to the Mixer, at the -input.
The mixer subtracts the DAC output from the amplified input, thus leaving sawtooth chunks: the residue of the ADC quantization.
The inverter either inverts or non-inverts the output, depending on the LSB of the ADC reading. Thus, it alternates between rising and falling slopes.
The ADC-DAC pair simply have as many bits as are needed for N folds; if you use a generic 8 or 12 bit ADC, for instance, you can simply round the output (i.e., for N = 16, use the 4 MSBs). For N != powers of 2, scale the input so the ADC only reads e.g. 0..9 instead of 0..15.
This gives a correct DC response, though it's a pretty shitty way to do it, because the propagation delay through the ADC-DAC will leave spikes on each transition, and the consistency between steps is limited by the linearity and matching of the ADC and DAC.
If you want a more analog method, an LM3914 is a neat little item. It's a 10 bit unary ADC. That is, the bit position (one-hot) or bit count (thermometer code) is the numerical result, rather than a binary number. To use this, you could run a resistor from each output pin to an op-amp summer as a simple DAC (so Vout = Vin * Rfb/Rin * N, for N active bits), and you have to reconstruct the LSB ('sign bit' as it were!) by XORing every other bit together. (A slightly simpler resistor-DAC style circuit could compute this as well.)
With 10 states, it could provide a maximum of 10 folds.
You could also build one by using a pair of window comparators, an up/down counting register (e.g., 74HC193?), and a DAC, all arranged in a feedback loop, so that the DAC output is subtracted from the input. As the input goes up, it crosses the threshold, causing the register to tick up, which raises the DAC output, subtracting one additional step from the input, pushing it back within bounds. You need to be careful that a DAC step is smaller than the comparator window (else it will perpetually chatter between steps!), and add logic to prevent the counter from over/underflowing (otherwise it'll tick off-scale and remain latched until the input reverses). The mixed input signal then consists of a sawtooth fold rather than a triangle fold; you have to add additional add/subtract/invert stages to get that.
Tim