Frequency limitations for beginners

[mg]

Hi there,

Today, I had opportunity to visit a high frequency digital dev lab where they develop customized ASICs and put them on HPC PCI cards.
As the name suggests, guys working there play with high frequencies, thus they have proper toys, like (>12GHz) o-scopes for 150k EUR, RF scanners, crazy soldering machines etc.
I never seen lab like that  so I opened my mouth wide

This gave me thinking about a frequency which I shouldn't cross or after crossing I will get hit by problems at different level (dimension), hard to solve without sophisticated tools.
I assume that such problems exists and for instance I can't simply solder IC which will work at 1GHz?

I would like consider this question under different frequency categories:
(a) bellow 100 MHz
(b) bellow 300 MHz
(c) bellow 500 MH
(d) bellow 1GHz

I guess (a) fits into the beginners range, but what for instance if we start touching things like DDR3, Cortex, Spartan6 which operate up to 1GHz?

[jahonen]

It is not the frequency what matters in digital electronics, it is the edge rate (rise/fall time) which is the main factor determining how difficult things are. Of course, timing margins get narrower when clock rate rises but those highest frequency things are usually serialized differential links so problem reduces to maintaining proper signal integrity.

Signal integrity stems basically from good control of impedance all the way from transmitter to receiver chip, which is mainly dependent on the materials and construction geometry. Of course, at highest frequencies, normal FR-4 becomes too lossy, but then we are talking something like >1 Gb/s serial links.

If you take the time to study basic properties of transmission lines and know how to create one within a PCB, then it certainly possible to make usable signal paths up to 1 GHz or so, without any special equipment. Of course, this almost always requires multilayer PCB (unless you are dealing with RF stuff, where there are only few signals, so wide traces are possible. Furthermore, RF signals are usually narrowband and good matching is required only on that narrow band, not from DC to n GHz or so as is the case with most digital signals).

Regards,
Janne

[Bored@Work]

It is not the frequency what matters in digital electronics, it is the edge rate (rise/fall time) which is the main factor determining how difficult things are.

Which boils down to a frequency issue again, as Mr. Fourier figured out in an other context in the 18th century. Sharp edges = lots of high frequency components. Failure to properly transmit those high frequency components = kiss your signal goodbye.

[mg]

Signal integrity stems basically from good control of impedance all the way from transmitter to receiver chip, which is mainly dependent on the materials and construction geometry. Of course, at highest frequencies, normal FR-4 becomes too lossy, but then we are talking something like >1 Gb/s serial links.

Is it only about SI?
I guess, it has to be more complicated than that?

What happens when after designing a PCB and assembling yourself components the thing does not work,  and you don't have 500MHz oscilloscope?
Where do you start - can you make it running?

[sacherjj]

Coming from the Amateur Radio side of things, there are some techniques that help with hacking on higher frequency circuits.  Building techniques such as Ugly Bug or Manhattan where circuits are build up from a solid copper board that is at ground.  Solder points are created with Meg Ohm resistors to ground.   With DIP chips on their back and pins our to the side, you get some advantage of the small capacitance from the pin to ground.  Freebie filter caps, as it were.

Even then, most HAMs don't play up much higher than 2 meter, or 144-148 MHz.  (Of course, some are hacking microwave transmitters...)

I'm perfectly happy down here at 20-30 MHz max, where my Rigol can play and the micros are cheap.

[ruku]

I developed a signal generator that was clocked at 25 MHz, and generated sinusoids at 1 MHz.

I didn't put much EM thought into the design, aside from having nice ground planes and decoupling. The 25 MHz was too fast for the board. I used a nice buffer IC to clean the clock signal. Right at the edge of the buffer I had a fairly sharp and clean edge. Down the clock line, however, things were starting to look sloppy.

From what I've read, 1 MHz is the limit of what you can accomplish without taking into EM considerations.

I need to update this thread, but here's a link to my post. Is updating ancient topics considered unkosher still?

https://www.eevblog.com/forum/index.php?topic=2623.0

Edit: My project worked--but I think my clock lines were sloppier than they should have been.

[mikemxyzzy]

It is the size of the structure relative to the wavelength that matters. In other words the electrical length. Anything less than 1/10 wavelength can generally be considered a lumped element.

[vk6zgo]

I developed a signal generator that was clocked at 25 MHz, and generated sinusoids at 1 MHz.

I didn't put much EM thought into the design, aside from having nice ground planes and decoupling. The 25 MHz was too fast for the board. I used a nice buffer IC to clean the clock signal. Right at the edge of the buffer I had a fairly sharp and clean edge. Down the clock line, however, things were starting to look sloppy.

From what I've read, 1 MHz is the limit of what you can accomplish without taking into EM considerations.

I need to update this thread, but here's a link to my post. Is updating ancient topics considered unkosher still?

https://www.eevblog.com/forum/index.php?topic=2623.0

Edit: My project worked--but I think my clock lines were sloppier than they should have been.

Even 1MHz is marginal,it's best to assume you will have higher frequency components,& try to minimise stray capacitance & inductance.
VK6ZGO

[Leo Bodnar]

What happens when after designing a PCB and assembling yourself components the thing does not work,  and you don't have 500MHz oscilloscope?
Where do you start - can you make it running?

If it's a digital project, slow the master clock down by x10 and see if it starts to work.

[jahonen]

It is not the frequency what matters in digital electronics, it is the edge rate (rise/fall time) which is the main factor determining how difficult things are.

Which boils down to a frequency issue again, as Mr. Fourier figured out in an other context in the 18th century. Sharp edges = lots of high frequency components. Failure to properly transmit those high frequency components = kiss your signal goodbye.

Frequency thinking approach is difficult when debugging single events, or something with duty cycles of near zero or 100%.

I once debugged a system where CPU single write accesses sometimes produced two writes on the peripheral. This happened regardless how many writes per time unit we performed. Note that this wasn't any kind of "high frequency" stuff, /WR-pulse width was 100 ns or so. After much head-scratching, it was determined that reason for the write failure was that edges seen by the peripheral were non-monotonic, and transmission line reflection spoiled the falling edge so that receiving device saw sometimes two writes, one on the falling edge and one on the rising edge. I happen to have a scope screenshot from the event:



As one can see, the signal spends quite a lot of time in undetermined region.

Thus, I think it can be concluded that if a single edge is transmitted properly, then it is irrelevant from the signal integrity viewpoint how many edges per time unit one transmits (clock rate). It is thus often easier to think in terms of edge rates, and relate that to transmission line lengths (termination requirements). If round-trip time is less than 1/10 of rise/fall-time (different limits exist), then the transmission line can be considered as lumped circuit.

Or if one does not have transmission lines in the PCB, one should get them in the first place. In practice this means a contiguous ground plane under the signal traces, with similar dielectric thickness than the trace width, so that trace impedance level drops to reasonable level (something like 80 ohms or below).

Regards,
Janne

[jahonen]

Is it only about SI?
I guess, it has to be more complicated than that?

What happens when after designing a PCB and assembling yourself components the thing does not work,  and you don't have 500MHz oscilloscope?
Where do you start - can you make it running?

What else it could be, if you have proper transitions and levels (SI) at proper times (timing), then the digital system hardware is guaranteed to work (unless some of the chips is bad or there is a functional issue in the design)?

Most problems can be seen with considerably less bandwidth, you don't often need to see the culprit exactly, but just a slight hint that it exists. But granted, sometimes there is no substitute for raw scope/probe bandwidth.

Anyway, if SI and/or timing is screwed badly due to PCB layout for something like DDRx, your game is often over, and it usually means that one must go back at the drawing board, as it is usually impossible to patch the signals to work properly (signals under BGA at internal layers etc). Importance of careful layout is obvious. There are also a number of good signal integrity tools, which can simulate how the signals look like in various points, to avoid producing expensive green coasters.

Regards,
Janne

[mg]

If it's a digital project, slow the master clock down by x10 and see if it starts to work.

This is a good advice.

[mg]

What else it could be, if you have proper transitions and levels (SI) at proper times (timing), then the digital system hardware is guaranteed to work (unless some of the chips is bad or there is a functional issue in the design)?

This is valuable info - thanks.
I thought that there are different issues than that which I am not aware.
I was really surprised with the amount of equipement these guys had.

[Neilm]

What else it could be, if you have proper transitions and levels (SI) at proper times (timing), then the digital system hardware is guaranteed to work (unless some of the chips is bad or there is a functional issue in the design)?

It could be poor layout resulting in the system causing itself problems. I once had a CPLD that kept failing when the databus it was attached to started up. The reason was the outputs of the CPLD were all set to fast slew rate. This caused sufficient EMI problems that it interupted the counter that was running producing intermittant results. Both bits had been tested and worked when the other part was not running. Simply setting the slew rate to slow fixed the problem. The clock it used was only running at 200kHz.

Neil

[jahonen]

It could be poor layout resulting in the system causing itself problems. I once had a CPLD that kept failing when the databus it was attached to started up. The reason was the outputs of the CPLD were all set to fast slew rate. This caused sufficient EMI problems that it interupted the counter that was running producing intermittant results. Both bits had been tested and worked when the other part was not running. Simply setting the slew rate to slow fixed the problem. The clock it used was only running at 200kHz.

Neil

That sounds like a SSN (simultaneous switching noise) effect, a.k.a. ground bounce/VCC sag because of too many outputs changing their state simultaneously. This is because power distribution at PCB (or IC packaging itself) is unable to keep the chip ground/VCC at proper levels due to di/dt induced voltage, another area of signal integrity (or power integrity). That is one reason why those BGAs with 100's of pins have large number of ground and VCC pins, to reduce the parasitic inductance which causes these kind of SSN problems.

Regards,
Janne

[Mechatrommer]

Frequency thinking approach is difficult when debugging single events, or something with duty cycles of near zero or 100%...
...Note that this wasn't any kind of "high frequency" stuff, /WR-pulse width was 100 ns or so...

Janne. you were indicating the pulse width of 100ns. what about the rise/fall time?
i believe (up to my limited knowledge) that BoredAtWork has a point too about high frequency component (Neilm's stated it as slew rate)
your hands on experience combined with neilm's can be a valuable input for beginners (like me) when such condition is encountered.

[jahonen]

Frequency thinking approach is difficult when debugging single events, or something with duty cycles of near zero or 100%...
...Note that this wasn't any kind of "high frequency" stuff, /WR-pulse width was 100 ns or so...

Janne. you were indicating the pulse width of 100ns. what about the rise/fall time?
i believe (up to my limited knowledge) that BoredAtWork has a point too about high frequency component (Neilm's stated it as slew rate)
your hands on experience combined with neilm's can be a valuable input for beginners (like me) when such condition is encountered.

Can't remember what it was by measuring directly from the driving pin, but estimating from the scope screenshot I linked, it seems to be about 3 ns or so.

Regards,
Janne

[Mechatrommer]

...it seems to be about 3 ns or so...

thanx. its like at least 83 MHz component there... freq = 4 x rise time freq = 1 / (4 x rise time) ... just my "bad" rule of thumb

[Bored@Work]

...it seems to be about 3 ns or so...

thanx. its like at least 83 MHz component there... freq = 4 x rise time... just my "bad" rule of thumb

Consider your thumbs broken, both of them 

Your formula doesn't make sense. With your formula the frequency increases when the rise time increases. However, increased rise time means slower rising, which means lower frequencies, not higher ones. Even if you know nothing about signals, the fact that the units don't match should ring an alert.

Try something like f = 1 / (k * t_rise); with k = 2 ... 3;

[vk6zgo]

Digital people seem to stumble over the idea that a decrease in rise time means an

increase in the frequency response required ,while to analog people,it is almost intuitive.

This may be because to digital folks,the signal is simply a means to an end,while in the

analog domain,non distortion of the signal is the important point.


Remember:- Decrease in signal rise time means wider frequency response required.

Note:- Peaking up the high frquencies only,won't do the job,you require flat

amplitude/ frequency (& phase/frequency response),so as not to distort the pulse.

Look up "Fourier Analysis" & "Pulse Techniques" on Google.


VK6ZGO

[Tony R]

Which boils down to a frequency issue again, as Mr. Fourier figured out in an other context in the 18th century. Sharp edges = lots of high frequency components. Failure to properly transmit those high frequency components = kiss your signal goodbye.

I wish to take this time to elaborate on what BoredAtWork said

According to Fourier, any periodic signal can be expressed by an infinite sum of sine and cosine waves. these waves have an integer multiple of a single frequency. These waves also have a scalier to kind of adjust the effect it has on the overall wave. being able to sum up all these frequencies (and there is an infinite number of them) can (if you want them to) give you a perfect square wave, zero rise time, zero overshoot, no ripple, perfect! However, adding up an infinite number of these waves is impossible, so what you do is you add up a lot of them and you get something close enough....

Another issue that occurs when you take into account parasitic capacitance and inductance. You have tiny capacitance and inductance in your traces, components, ext. and they don't like to change in zero time so that drags out your rising and falling edge slowing down the speed you can operate at. if the next rising edge after the falling edge is not enough time for the parasitic coincidences to discharge fully, you will ever get a 0, same in reverse...

as for a beginner, i would say under 1MHz outside of a processor, if your processor is running at 12MHz (with internal oscillator) but your not seeing anything outside the chip that is above 1MHz, you should be fine. When you start to get above that you will start to see some odd effects.

Breadboards are great for low frequencies but if you want to get above low frequencies you need to use other prototyping methods. Breadboards are loaded with parasitic things that you don't want.

[Mechatrommer]

thanx. its like at least 83 MHz component there... freq = 4 x rise time... just my "bad" rule of thumb

Consider your thumbs broken, both of them  
Try something like f = 1 / (k * t_rise); with k = 2 ... 3;

typo corrected. thats what happen if i type without double check

[Mechatrommer]

Digital people seem to stumble over the idea that a decrease in rise time means an
analog domain,non distortion of the signal is the important point.
Remember:- Decrease in signal rise time means wider frequency response required.
Note:- Peaking up the high frquencies only,won't do the job,you require flat
amplitude/ frequency (& phase/frequency response),so as not to distort the pulse.

i imagine the higher freq component will got reflected and distort the signal. thats physics i think. but well, more experienced people can explain the distortion that Janne was experiencing better (edit: Janne did that already). i was just giving my 2cnts thought. will study more on Fourier.
edit: the vk6's bolded reply is in agreement with fourier theory.

[scrat]

as for a beginner, i would say under 1MHz outside of a processor, if your processor is running at 12MHz (with internal oscillator) but your not seeing anything outside the chip that is above 1MHz, you should be fine. When you start to get above that you will start to see some odd effects.

I don't get what you're meaning (but maybe it's a language issue), I suppose also beginners would have some troubles understanding this.

Breadboards are great for low frequencies but if you want to get above low frequencies you need to use other prototyping methods. Breadboards are loaded with parasitic things that you don't want.

The topic was to define such a low-to-high frequency limit, which definitely depends on too many things.
For example, I've had troubles amplifying 10MHz signals (100x) on an SMD PCB, but an MCU running from an external clock at 20MHz and communicating on full-speed USB (without any shielded cable) works perfectly on a bread-board (without any particular attention).

[Neilm]

That sounds like a SSN (simultaneous switching noise) effect, a.k.a. ground bounce/VCC sag because of too many outputs changing their state simultaneously. This is because power distribution at PCB (or IC packaging itself) is unable to keep the chip ground/VCC at proper levels due to di/dt induced voltage, another area of signal integrity (or power integrity). That is one reason why those BGAs with 100's of pins have large number of ground and VCC pins, to reduce the parasitic inductance which causes these kind of SSN problems.

Probably - although I had done some tests that indicated that it was not that. At the time (about 10 years ago) I was working against a deadline getting ready for a show - once I got it working I didn't do any further investigation. I was not as knowledgeable about EMI and PCB design as I now am. (mostly learnt debugging EMC failures)

Neil

Neil