Sometimes, on a four layer board, if I'm not routing many traces on the bottom, I'll use pours on the bottom plane for power, and then make both internal planes ground planes, tightly stitched. By that you mean you add a uniform grid array of internal uVias to stitch the two internal ground planes together?
You have the idea, except that they don't need to be internal or micro, and don't really need to be uniformly spaced, as long as they're a close as reasonalble (1/4 inch average spacing, or density of 16 or more per inch, where signals are passing by).
In that case, I'll make sure to place a ground-stitch via right next to any vias where a signal trace switches from top to bottom layer or vice versa.Ah, interesting idea. I think I've seen that technique described somewhere but I didn't fully understand the reasoning until now. Is there a recommended minimum spacing distance between the vias, or is "as close as can be manufactured" the best in this case?
I get the impression you do understand the reasoning by now. The purpose is that the ground return path has a way to jump from one ground plane to the next as close as possible to the signal line, keeping loop area small. You would want to make the via as close as possible without stressing manufacturing capability, but taking care that you don't choke off the copper connections on the signal via, depending on your via-connection style. Your DRC will warn you if you are too close, if it's set up properly.
If you are using the more common sig-gnd-pwr-sig stackup, then put a capacitor somewhere close to the signal vias, to stitch the gnd and 5V planes at high frequencies, providing a high-frequency signal return path that follows the signal from GND to PWR planes.I see. Would it be overkill to put such a power dcap next to every signal via?
That really depends on your application. For High-end, high reliability, high frequency, high markup applications where you not only really want to pass compliance testing the first time, but also want to be as robust as possible, I'd say it's probably not overkill. For high-volume, low margin consumer apps, especially on high-density boards where you have lots of bypassing anyway, the already installed bypass caps may provide a small enough path divergence that you will be fine for low frequency signals. The issue there will be more of immunity than of radiation. If you have adequate filtering or chokes on your low frequency signals, use the slowest spec part that will suit your application (e.g., 74LSxx instead of 74ACTxx; 4 MHz uP instead of 20 MHz), you probably won't have any issues. But it's good to know about the technique, in case you do have any issues at compliance testing.
If you're making hobby boards or kits, and don't have to worry about compliance, then you can do just focus on the high-frequency or sensitive signals. In my case, for hobby boards, I'll use 2 layers if everything fits, and do all the tricks I can throw in for free, and worry about high-frequency signals as special cases. For commercial boards where robustness and reliability are a concern, and price is not, I start with 4 layers as a minimum, and either use the 2-ground layer technique if there's room, or the stackup you listed if there's not, and worry about the immunity of the low-frequency lines as well, put the i/o sections on their own chassis-connected planes, and route all the wires in from those sections via chokes.