Help in deriving Zin small-signal expression

[promach]

Could anyone guide me in deriving the Zin expression below ? How do I model the two transconductance block in small-signal model including their output impedance ?

[The Electrician]

A model for a single transconductance would be like this:



This is a two-port: https://en.wikipedia.org/wiki/Two-port_network

Its two-port Y parameters can be written like this:



But you have another transconductance going in the reverse direction.  Its admittance matrix looks like this:



A gyrator is two transconductances going in opposite directions like you have.  See: https://en.wikipedia.org/wiki/Gyrator

The Y matrix (admittance matrix) for a gyrator with infinite output impedances for your circuit would be:

[The Electrician]

If you add a capacitor CL at the right side of the gyrator, that load can be added to the admittance matrix of the gyrator in the 2,2 element of the admittance matrix:



Now to find the input impedance of the gyrator with that CL load on the output, we need only invert our admittance matrix:



The 1,1 element of the inverse matrix is your input impedance.  Compare that to what your book gives for the first case.

To add output impedances to the two transconductances we need to add a couple of terms to the admittance matrix:



Now we need to add the capacitor  CL to the output:



Finally, to get the input impedance, we invert the admittance matrix:



The desired input impedance is the red 1,1 element of the inverse matrix.

[promach]

You made things too complicated. Please see the derivation process below:

The first gm stage plus CL forms an integrator. What is it integrating? The voltage at node X. The second gm stage completes a feedback loop which tries to keep the voltage at node X held constant at the point where you get no output current from the first gm stage. If you inject a current into node X, the feedback loop will respond to adjust the voltage on CL until the 2nd gm stage absorbs all of that current. This gives you a low impedance at low frequencies. How low? Just 1/(gm1rout1gm2). I.e. 1/total_gm. What happens at high frequencies? CL becomes low impedance effectively removing the effect of the feedback loop. Now the impedance you see is high. How high? Ignoring capacitances associated with the gm stages, Rout2. So you have a low impedance at low frequencies that becomes high impedance at high frequencies. That is an inductor. For the two break frequencies think about it this way. At very low frequencies, Rout1 has a lower impedance than CL and it isn't until Rout1 = |1/(jwCL)| that you start to see appreciable effects from CL. That is just w = 1/(Rout1CL). At the high frequency end, you can solve for when the inductive part equals Rout2, or you can disconnect node X from all but the gm stages and realize that CL sees a resistance of 1/(gm2Rout2gm1) and so the pole frequency is 1/(gm2Rout2*gm1). Note that this analysis and the plot you show both ignore the effects of capacitances associated with the transistors in the gm stages. Those will be important at some point.

Regarding the quote above, How do I derive the equation "Just 1/(gm1rout1gm2). I.e. 1/total_gm" ?

[The Electrician]

I don't think I made it too complicated.  The image you show has everything all together on one page.  I showed everything in linear fashion, one step at a time.

If you want my solution to look less complicated here's the version without all the steps shown in excruciating detail:



As to your question, the large quote you show apparently was posted on another forum I haven't seen, and I believe there are some errors in it.

Look at the Bode plot associated with the original problem statement.  It shows an upper corner frequency at (Gm1 Gm2 Rout2)/CL due to the pole in the expression for Zin.  It is not exactly correct, but it is a good approximation if you can neglect the (+1) term in the denominator of the Zin expression.

The denominator of the Zin expression is (Rout1 CL s + Gm1 Rout1 Gm2 Rout2 + 1).  If this is solved for s, the result is:

(1+Gm1 Rout1 Gm2 Rout2)/(Rout1 CL) which is the exactly correct pole frequency.

In order to get the pole frequency shown in the Bode plot we have to neglect the (+1) term
and solve (Rout1 CL s + Gm1 Rout1 Gm2 Rout2) for s.  Then we get a pole frequency of (Gm1 Gm2 Rout2)/CL

The large comment says "If you inject a current into node X...This gives you a low impedance at low frequencies. How low? Just 1/(gm1rout1gm2)"

That is not the result I get for the resistance at node X.  To get the resistance at node X, simply remove the +s CL term from the admittance matrix and invert it.  The resistance seen at node X is the red element of the inverse:



In order to get the expression in the large comment (from another forum) you show, it's necessary to ignore the (1+) term in the resistance expression I show in red.  I believe the expression in the large comment is in error.

The expression in the large comment for the resistance seen by CL suffers from the same neglect of the (1+) term.  The commenter simply asserts: "...you can disconnect node X from all but the gm stages and realize that CL sees a resistance of 1/(gm2Rout2gm1) and so the pole frequency is 1/(gm2Rout2*gm1)"

He doesn't show how he calculated that "CL sees a resistance of 1/(gm2Rout2gm1)", and then he makes a mistake when he says "the pole frequency is 1/(gm2Rout2*gm1)"; the pole frequency would be gm2 Rout2 gm1/CL if the expression for the resistance seen by CL were correct.  Perhaps he didn't actually calculate the resistance seen by CL, but just asserted that it is 1/(gm2Rout2gm1) because that would match up with what is shown on the Bode plot.

[promach]

To get the resistance at node X, simply remove the +s CL term from the admittance matrix

Could you explain why so ?

[The Electrician]

To get the resistance at node X, simply remove the +s CL term from the admittance matrix

Could you explain why so ?

You left out the last part of the sentence; the complete sentence is:

"To get the resistance at node X, simply remove the +s CL term from the admittance matrix and invert it."

I'm not sure exactly what you're asking.  Are you asking why remove the +s CL term?  Or are you asking why invert the admittance matrix?

The +s CL term is removed because we want the resistance at low frequencies.  The lowest possible frequency is DC, and we get that result by removing CL.

We invert the admittance matrix because that converts it into an impedance matrix and the diagonal elements of the Z (impedance) matrix of a two port are the impedances of the ports.

Another way to get the impedance at low frequencies is to take the limit of the Zin expression as s approaches zero:



This gives the same result.

[promach]

Why total_gm = gm1rout1gm2 ?

Besides, if you look at https://cloudfront.escholarship.org/dist/prd/content/qt1pg6p6nb/qt1pg6p6nb.pdf?t=o3sama#page=57 which is the thesis "RF Synthesis without Inductors", there is another rewritten expression of Zin. Could you elaborate/explain on the interpretation of this expression without deriving it step-by-step using small-signal circuit model ?

Zin = [CLs/(Gm1Gm2)+(Gm1Gm2Rout1)-1] || Rout2

[The Electrician]

Why total_gm = gm1rout1gm2 ?

This is a matter of interpretation.  I can't explain why the product of the two transconductances and rout1 would be considered some sort of total transconductance.

Besides, if you look at https://cloudfront.escholarship.org/dist/prd/content/qt1pg6p6nb/qt1pg6p6nb.pdf?t=o3sama#page=57 which is the thesis "RF Synthesis without Inductors", there is another rewritten expression of Zin. Could you elaborate/explain on the interpretation of this expression without deriving it step-by-step using small-signal circuit model ?

Zin = [CLs/(Gm1Gm2)+(Gm1Gm2Rout1)-1] || Rout2

If you consider this circuit:



The impedance expression for the circuit would be:

(s L + Rs) || Rp

You can see how Rs is the series resistance and Rp is the parallel resistance.  Compare to the expression you're asking about.

[danmc]

I don't think I made it too complicated.  The image you show has everything all together on one page.  I showed everything in linear fashion, one step at a time.

If you want my solution to look less complicated here's the version without all the steps shown in excruciating detail:



As to your question, the large quote you show apparently was posted on another forum I haven't seen, and I believe there are some errors in it.

Look at the Bode plot associated with the original problem statement.  It shows an upper corner frequency at (Gm1 Gm2 Rout2)/CL due to the pole in the expression for Zin.  It is not exactly correct, but it is a good approximation if you can neglect the (+1) term in the denominator of the Zin expression.

The denominator of the Zin expression is (Rout1 CL s + Gm1 Rout1 Gm2 Rout2 + 1).  If this is solved for s, the result is:

(1+Gm1 Rout1 Gm2 Rout2)/(Rout1 CL) which is the exactly correct pole frequency.

In order to get the pole frequency shown in the Bode plot we have to neglect the (+1) term
and solve (Rout1 CL s + Gm1 Rout1 Gm2 Rout2) for s.  Then we get a pole frequency of (Gm1 Gm2 Rout2)/CL

The large comment says "If you inject a current into node X...This gives you a low impedance at low frequencies. How low? Just 1/(gm1rout1gm2)"

That is not the result I get for the resistance at node X.  To get the resistance at node X, simply remove the +s CL term from the admittance matrix and invert it.  The resistance seen at node X is the red element of the inverse:



In order to get the expression in the large comment (from another forum) you show, it's necessary to ignore the (1+) term in the resistance expression I show in red.  I believe the expression in the large comment is in error.

The expression in the large comment for the resistance seen by CL suffers from the same neglect of the (1+) term.  The commenter simply asserts: "...you can disconnect node X from all but the gm stages and realize that CL sees a resistance of 1/(gm2Rout2gm1) and so the pole frequency is 1/(gm2Rout2*gm1)"

He doesn't show how he calculated that "CL sees a resistance of 1/(gm2Rout2gm1)", and then he makes a mistake when he says "the pole frequency is 1/(gm2Rout2*gm1)"; the pole frequency would be gm2 Rout2 gm1/CL if the expression for the resistance seen by CL were correct.  Perhaps he didn't actually calculate the resistance seen by CL, but just asserted that it is 1/(gm2Rout2gm1) because that would match up with what is shown on the Bode plot.

Unfortunately what was missing in that quoted comment (from me) was the context.  It was in response to promach asking if there was any simple way to understand the basic operation of the circuit (Why is it a gyrator? Approximately what should be a result?)  without getting bogged down in algebra.  So yes, I intentionally ignored a number of 1+ terms.  Like the DC resistance at node X.  As you noted it is Rout2 || (1/(gm1*rout1*gm2) which is hopefully dominated by the gm1*rout1*gm2 part.  Same thing for the exact pole frequency.  It ends up being a similar thing with an output resistance in parallel with a 1/gm as you noted.  So you are correct that there are 1+'s missing but it wasn't so much a mistake/error as it was trying to give a really simplified view point.  There was a long thread basically starting with why his circuit didn't simulate as expected and I had given a bunch of suggestions on simplifying to something small with known results to prove out things like the test bench and post processing.  Some of the values in the original circuit made it questionable (CL pretty small to where transistor capacitances could affect things).  The test bench hadn't been fully proven (do you get the right result with an inductor instead of the gyrator?  Do you get the right answer with ideal gm stages?  Are you getting the gm you expected from the real transistors?).    There were questions about how to actually simulate some of the individual stages like making sure the test circuit was biased and correctly processing the simulated data.  Lots of stuff.  Towards the end was the question of how do you look at the circuit and internalize why it should look inductive as opposed to doing a bunch of algebra and coming up with an answer of it being inductive over some frequency range.  So what I was giving was the minimal-math version of about what you should see.  So, that is the context.  It wasn't meant to be an exact result.

-Dan

[danmc]

Why total_gm = gm1rout1gm2 ?

This is a matter of interpretation.  I can't explain why the product of the two transconductances and rout1 would be considered some sort of total transconductance.

[/quote]

Again, context.  It was from the viewpoint of you wiggle the voltage going into the first gm stage and see what current comes out of the 2nd gm stage at low frequencies.  First stage has dc gain gm1*rout1.  So first stage (low freq) output voltage is Vx * gm1*rout1, multiply by gm2 to get 2nd gm stage output current (ignoring Rout2), and you have I2= Vx*gm1*rout1*gm2.  So it looks like a transconductance whose gm is gm1*rout1*gm2.  Then DC resistance is Rout2 || 1/(gm1*rout1*gm2).   To the extent that gm1*rout1*gm2*rout2 >> 1 this 1/(gm1*rout1*gm2).  The exact expression of course is a little more complicated.

[The Electrician]

Unfortunately what was missing in that quoted comment (from me) was the context.  It was in response to promach asking if there was any simple way to understand the basic operation of the circuit (Why is it a gyrator? Approximately what should be a result?)  without getting bogged down in algebra.  So yes, I intentionally ignored a number of 1+ terms.  Like the DC resistance at node X.  As you noted it is Rout2 || (1/(gm1*rout1*gm2) which is hopefully dominated by the gm1*rout1*gm2 part.  Same thing for the exact pole frequency.  It ends up being a similar thing with an output resistance in parallel with a 1/gm as you noted.  So you are correct that there are 1+'s missing but it wasn't so much a mistake/error as it was trying to give a really simplified view point.  There was a long thread basically starting with why his circuit didn't simulate as expected and I had given a bunch of suggestions on simplifying to something small with known results to prove out things like the test bench and post processing.  Some of the values in the original circuit made it questionable (CL pretty small to where transistor capacitances could affect things).  The test bench hadn't been fully proven (do you get the right result with an inductor instead of the gyrator?  Do you get the right answer with ideal gm stages?  Are you getting the gm you expected from the real transistors?).    There were questions about how to actually simulate some of the individual stages like making sure the test circuit was biased and correctly processing the simulated data.  Lots of stuff.  Towards the end was the question of how do you look at the circuit and internalize why it should look inductive as opposed to doing a bunch of algebra and coming up with an answer of it being inductive over some frequency range.  So what I was giving was the minimal-math version of about what you should see.  So, that is the context.  It wasn't meant to be an exact result.

-Dan

Without the context you have given, I could only answer promach's questions stand alone.

I found promach's thread on the Designer's Guide forum.  Over there he wanted an intuitive understanding of Zin.  Here he just asked to be shown how to derive Zin, with no mention of intuition.

He has posted this question on three forums.

The image in the first post showing a Bode plot neglected the +1 term, so when I derived Zin for him and there was a +1 term in it, I assumed that it might be negligible and I said so; to determine if it's really negligible, one would have to plug in some numbers for the variables.

I think when somebody gives expressions for things like impedance and breakpoints, they should mention if they are neglecting parts of them and deriving a simpler approximation.  For guys like you and me it might be obvious but for the newbie when they go through the algebra and get a different result, they may be wondering why.

For a question like "Regarding the quote above, How do I derive the equation "Just 1/(gm1rout1gm2). I.e. 1/total_gm" ?", promach should really be asking you to explain.

[The Electrician]

Again, context.  It was from the viewpoint of you wiggle the voltage going into the first gm stage and see what current comes out of the 2nd gm stage at low frequencies.  First stage has dc gain gm1*rout1.  So first stage (low freq) output voltage is Vx * gm1*rout1, multiply by gm2 to get 2nd gm stage output current (ignoring Rout2), and you have I2= Vx*gm1*rout1*gm2.  So it looks like a transconductance whose gm is gm1*rout1*gm2.  Then DC resistance is Rout2 || 1/(gm1*rout1*gm2).   To the extent that gm1*rout1*gm2*rout2 >> 1 this is 1/(gm1*rout1*gm2).  The exact expression of course is a little more complicated.

It's promach that asked for an explanation of this.  I couldn't provide it, so I hope this satisfies him.

-------------------------------------------------------------------------------------------------------------------

promach seems to me to lack the easy facility with algebra you and I have, so when you say:

"Then DC resistance is Rout2 || 1/(gm1*rout1*gm2).   To the extent that gm1*rout1*gm2*rout2 >> 1 this is 1/(gm1*rout1*gm2)."

Showing more intermediate steps might preclude his asking for further explanation:

[promach]

Do you get the right answer with ideal gm stages?

YES

Are you getting the gm you expected from the real transistors?

NO


@danmc

What can I do in this case ? I am planning to derive the Rout2 algebra as well as measure the output impedance in simulation.


@The Electrician

This is the development branch of the active inductor implementation that I am still working on https://github.com/promach/frequency_trap/tree/development


What do you guys have in mind ?
Besides, I am still a bit confused how  Zin = [CLs/(Gm1Gm2)+(Gm1Gm2Rout1)-1] || Rout2  is interpreted with simple intuition and without much algebra maths

[The Electrician]

Besides, I am still a bit confused how  Zin = [CLs/(Gm1Gm2)+(Gm1Gm2Rout1)-1] || Rout2  is interpreted with simple intuition and without much algebra maths

The -1 in red above should really be an exponent of -1 applied to the expression (Gm1 Gm2 Rout1)

Consider the circuit consisting of an inductor with a series resistor and a parallel resistor:



The impedance of this is: Z = (s L + Rs) || Rp.  Do you see why?

Now compare that term by term with the expression you're asking about:

Zin = [CLs / (Gm 1Gm2) + (Gm1 Gm2 Rout1)^-1] || Rout2
 Z  =  [         s L             +              Rs                ] ||    Rp

So the expression CL / (Gm1 Gm2) is the inductance of the synthetic inductor, 1/(Gm1 Gm2 Rout1) is the series resistance of the synthetic inductor, and Rout2 is the resistance in parallel.

[The Electrician]

promach, you have asked about intuitive understanding.  Have a look at the Wikipedia page on the gyrator: https://en.wikipedia.org/wiki/Gyrator

Go down the page to the part titled: Application: a simulated inductor

The circuit shown only uses a single opamp, and it's not a true gyrator, but read the explanation; you might find this circuit easier to intuitively understand.

------------------------------------------------------------------------

Also, when you say "I am planning to derive the Rout2 algebra as well as measure the output impedance in simulation.", just what is it that you do to "derive the Rout2 algebra"?  danmc may know what you mean, but I don't.

[promach]

I am trying to determine suitable mosfet sizing for the following transconductance circuit block.

It seems to me that I need to minimize 1/(Gm1Gm2Rout1)  as well as maximize Rout2 ?

This is the small signal model I have drawn up to derive the Rout2 algebra. I need some help in formulating the small-signal mesh/nodal equations to obtain Rout2

       

[promach]

Why is   sC/(Gm1Gm2) placed in series with 1/(Gm1Gm2Rout1) ?

[The Electrician]

Why is   sC/(Gm1Gm2) placed in series with 1/(Gm1Gm2Rout1) ?

Read this: https://en.wikipedia.org/wiki/Equivalent_series_resistance

Real inductors and capacitors are not loss free.  When a voltage or current is applied to them there are parasitic loss mechanisms that cause a loss of energy.  Those losses can be modeled as resistors in series, or in parallel, or both sometimes.

[The Electrician]

I am trying to determine suitable mosfet sizing for the following transconductance circuit block.

It seems to me that I need to minimize 1/(Gm1Gm2Rout1)  as well as maximize Rout2 ?

This is the small signal model I have drawn up to derive the Rout2 algebra. I need some help in formulating the small-signal mesh/nodal equations to obtain Rout2

Just above the fourth image down in your thread at the Designer's Guide forum I see nodal equations and a solution for gm obtained using Maxima.  To obtain Rout2 inject 1 amp into the node where you want to get Rout2 and solve for the voltage Vout there.  Then Rout2 will be Vout/1 amp; the expression obtained for Vout will also be the expression for Rout2.

You can expect that expressions you derive for various voltages, currents, and impedances will be huge, nearly intractable expressions just like the one you already obtained for gm.

[promach]

Let me try deriving Rout2 on my own then.

Besides, I have attached a book chapter (which you can also find in public domain without any paywall) detailing the lossy characteristics of the gyrator, leading to explanation on ESR and parallel resistance of the active inductor.

[promach]

In order to determine suitable transistor size, I need to determine the Rout2 equation with respect to ro of each mosfets.

Gate of mosfet M6 is not driven and connected to GND during Rout2 small-signal calculation.

But generally, how many nodal equations do I need since voltage at source node of M6 is not known to me at the moment ?

[The Electrician]

In order to determine suitable transistor size, I need to determine the Rout2 equation with respect to ro of each mosfets.

Gate of mosfet M6 is not driven and connected to GND during Rout2 small-signal calculation.

But generally, how many nodal equations do I need since voltage at source node of M6 is not known to me at the moment ?

In the image in response #16 above it looks like M5 is the one with the grounded gate.  Is that the model you will be using?

[promach]

M5 is the one with the grounded gate

I suppose gate of M5 has to be connected to AC ground ?

[The Electrician]

M5 is the one with the grounded gate

I suppose gate of M5 has to be connected to AC ground ?

I don't know if it "has to be" connected to AC ground, but isn't that what is shown in the image in response #16?  Which model do you want to use for your analysis?

[promach]

Do you guys have any comments on the KCL equations I have set up in order to find out Rout2 expression which is Vx/Ix ?

Note: Vx is the test voltage at the output node at drain of M5 , while Ix is the test current source going into the output node

[The Electrician]

One of the things I find most annoying about trying to help someone on a forum is when I ask a question whose answer is important to my ability to help, and the question is not answered.

I asked you in reply #22 and #24 what model you will be using, and you haven't answered.  I'm guessing that it's the model in reply #16, but you should acknowledge if that is true.

There is also a schematic in reply #16 from which I presume the model is derived.  There are aspects of the schematic that you haven't included in the model.  For example, the symbol Vss appears in the schematic, but not in the model.  Vss, or course, is AC ground for small signal purposes.

Look at your first equation; the last term in that equation is (Vx - Vss)/ro5.  You need to make sure that every voltage you have in any of your equations appears in the model.  Since Vss is small signal ground, it shouldn't appear in any equation anyway whether on not you show it on the model.  Get rid of it everywhere you used it.  It's connected to your reference node (ground), and it's value is zero.

Also, please label the voltages at the various nodes.  Label the voltage at node 1 as v1, the voltage at node 2 as v2, the voltage at node 3 as v3, and the voltage at the output node as vo.

Your model shows the output node as grounded, with Iout flowing into ground.  Nodal analysis calculates voltages at nodes that are not grounded. Show the output node driving a load resistance RL,  If you later need the current into ground (a short, in other words), you can let RL be zero ohms.

Show a model with the nodes labeled v1, v2, etc,. and rewrite the equations using those voltages.  For example, the first term in your node 2 equation is (Vss - Vs6)/Rs; this can't be right because neither end of Rs is connected to Vss on the schematic (never mind that you don't show Vss on the model as I already pointed out).  Remember that on the schematic Vss is actually ground for small signal purposes.  The current sources I1 and I2 don't provide  node 2 or node 3 with a signal carrying connection to Vss (ground).  The current sources (if ideal) are infinite impedances.  They only provide the DC conditions, and they have no effect on small signal behavior.

Look at the last term of the equation for node 2.  What is that item in the numerator?  It looks like VDS6.  Is that the voltage from drain to source of M6?  If so, don't represent it like that.  The voltage from drain to to source of M6 should be represented as v1-v2.  Use the symbols v1, v2, v3, and vo for voltages in the numerators of terms in your equations.

Since M5's gate is grounded, you could replace M5 with a fixed impedance.

Update your model as I've suggested and rewrite your equations.  Show the results here and we can continue from there.

[promach]

Since M5's gate is grounded, you could replace M5 with a fixed impedance.

What happen to the current source gm5*Vgs5 ?

Look at your first equation; the last term in that equation is (Vx - Vss)/ro5.

No, it is Vs5 instead of Vss

It looks like VDS6.  Is that the voltage from drain to source of M6?

Yes, you are right that it is Vds6

Your model shows the output node as grounded, with Iout flowing into ground.

That model is used for Gm2 transconductance

For output impedance Rout2, output node is not grounded. Note that Vx is the test voltage at the output node at drain of M5 , while Ix is the test current source going into the output node

[The Electrician]

Forget about replacing M5 with a resistor.  I made that comment before I looked carefully at where the source of M5 is connected.

Please do a new model image with the nodes labeled v1, v2, v3, vo and new equations using those designators.

[promach]

Code: [Select]

node_1: V1/ro4 + gm4*V1 + (V1-V2)/ro6 + gm6*(0-V2) = 0

node_2: (V2-V1)/ro6 + (V2-V3)/Rs - gm6*(0-V2) = 0

node_3: (V3-V2)/Rs + (V3-Vx)/ro5 + gm5*V3 = 0

output_node: Ix - gm3*V1 - Vx/ro3 + gm5*V3 - (Vx-V3)/ro5 = 0
Note: Vx is the test voltage at the output node at drain of M5 , while Ix is the test current source going into the output node

[The Electrician]

Code: [Select]

node_1: V1/ro4 + gm4*V1 + (V1-V2)/ro6 + gm6*(0-V2) = 0

node_2: (V2-V1)/ro6 + (V2-V3)/Rs - gm6*(0-V2) = 0

node_3: (V3-V2)/Rs + (V3-Vx)/ro5 + gm5*V3 = 0

output_node: Ix - gm3*V1 - Vx/ro3 + gm5*V3 - (Vx-V3)/ro5 = 0
Note: Vx is the test voltage at the output node at drain of M5 , while Ix is the test current source going into the output node

It took me a while to realize that you are using P channel FETs for M3 and M4.  The text you linked to seems to be using only N channel FETs.  Given that, your equations look correct, but I have a few comments.

Since you will probably be using these equations for calculating other quantities, such as various gains, I wouldn't use a variable name Vx just for the purpose of calculating Rout2.  Leave the 4th node as vo.

You used the convention that current out of a node is positive for your first 3 equations, and used the opposite for the last equation.  Since you can just multiply the left side by -1 and that won't change the sign of the zero on the right side, it doesn't matter when you go to solve the equations.  But, I think that's a bad practice; choose a convention and stick to it.

If you later need to calculate gains, you will need to include Vin in the equations.  You might as well leave that in there now and just set Vin = 0 for the Rout2 calculation to avoid forgetting where Vin goes later.

Just set Ix equal to 1, and then the impedance at the vo node will be equal to (vo)/(1 amp).  In other words, when you inject 1 amp into the vo node, the expression for the voltage there is the same as the expression for the impedance there.

If I make the above changes, here are the equations as I have them, ready to solve:



Here's the solution:



What do you get for the expression at vo if you plug in some numbers for the various transconductances and resistances?  Does it make sense?

[bson]

You know there's a function TeXForm[] in Mathematica?  E.g.:

Code: [Select]

%21 // TeXForm
\frac{\text{Rout2}}{\text{Gm1} \text{Gm2} \text{Rout1} \text{Rout2}+1}

Copy and paste, with $ $ (no space) before and after, e.g.:

$$ \text{Limit}\left[\frac{\text{Rout1} \text{Rout2} s C_L+\text{Rout2}}{\text{Rout1} s C_L+\text{Gm1} \text{Gm2} \text{Rout1} \text{Rout2}+1},s\rightarrow 0\right] $$

$$ \frac{\text{Rout2}}{\text{Gm1} \text{Gm2} \text{Rout1} \text{Rout2}+1} $$

No need to fuss with screen captures...

Or, inline: \$ \frac{\text{Rout2}}{\text{Gm1} \text{Gm2} \text{Rout1} \text{Rout2}+1} \$

[The Electrician]

I'm aware that Mathematica can produce TeX, but I prefer the appearance of the native Mathematica format.  The generated TeX has no spaces between variables, and it insists on having "\text" in front of every little thing.

You chose a fairly simple example, but see what Mathematica generates for my image in reply #30:



I don't mind pasting images.

[promach]

However, for gm and ro calculation for each mosfets, how do I obtain some transistor characteristic parameter such as uo and Cox from BSIM4 mosfet models ?

http://ngspice.sourceforge.net/external-documents/models/BSIM480_Manual.pdf

https://github.com/promach/frequency_trap/blob/development/modelcard.nmos

https://github.com/promach/frequency_trap/blob/development/modelcard.pmos

[The Electrician]

However, for gm and ro calculation for each mosfets, how do I obtain some transistor characteristic parameter such as uo and Cox from BSIM4 mosfet models ?

http://ngspice.sourceforge.net/external-documents/models/BSIM480_Manual.pdf

https://github.com/promach/frequency_trap/blob/development/modelcard.nmos

https://github.com/promach/frequency_trap/blob/development/modelcard.pmos

I can't help you here.  Perhaps danmc can help.

[Wimberleytech]

I can't help you here.  Perhaps danmc can help.

I am jumping in on page 2 of this thread...have already done a promach torture test.

Take a look at CMOS Analog Circuit Design by Allen/Holberg  first edition, chapter 4, second edition Appendix B, third edition Appendix C.
Zero-field mobility is the same for all models...as is Cox.

You can download it here: https://archive.org/details/Allen2011CmosAnalogCircuitDesign3e

[promach]

I am now reading https://archive.org/stream/Allen2011CmosAnalogCircuitDesign3e/allen%202011%20-%20cmos%20analog%20circuit%20design%203e#page/n673/mode/2up/search/appendix

Could you elaborate on "Zero-field mobility is the same for all models...as is Cox." ?  I am not very familiar with CMOS device details and I am bit confused with your sentence.

[Wimberleytech]

I am now reading https://archive.org/stream/Allen2011CmosAnalogCircuitDesign3e/allen%202011%20-%20cmos%20analog%20circuit%20design%203e#page/n673/mode/2up/search/appendix

Could you elaborate on "Zero-field mobility is the same for all models...as is Cox." ?  I am not very familiar with CMOS device details and I am bit confused with your sentence.

There are many models that have been developed for MOS transistors over the years.  Some parameters used in models have significance or meaning only within that model.  U₀ and C_ox are physical parameters that do not depend on the model.  So, any model that needs a value for U₀ and/or C_ox will use the same values as any other model.

[promach]

U0 and Cox are physical parameters that do not depend on the model.

Why would this be the case ?

Besides, in this case, how do I obtain the value of U0 and Cox ?

[Wimberleytech]

U0 and Cox are physical parameters that do not depend on the model.

Why would this be the case ?

U₀ is carrier mobility.  Yes, it depends on crystal orientation and perhaps other things, but most circuit-simulation models start with a value for mobility at zero field and adjust that value as a function of temperature, electric field, and other stuff. 

Same for C_ox.  It is essentially e/t_ox where e is permitivity.  So e, is e, t_ox is the oxide thickness grown over the gate channel.

Besides, in this case, how do I obtain the value of U₀ and C_ox ?

C_ox can be measured directly using several devices with appropriate geometries.  U₀ can be measured indirectly as well.

[promach]

In saturation region:
Cgs= (2/3)WLC'ox
Cox=WL*C'ox

I found the above in one other forum. Why would Cox be different when it is not in saturation region ?

Besides, U0 could be found directly inside the model itself as in https://github.com/imr/ngspice/blob/master/examples/xspice/table/modelcards/modelcard.nmos#L55

[Wimberleytech]

In saturation region:
Cgs= (2/3)WLC'ox
Cox=WL*C'ox

I found the above in one other forum. Why would Cox be different when it is not in saturation region ?

Because in saturation, the charge in the channel (inversion layer) varies from the source to the drain.  This is because the electric field is decreasing in magnitude as you get closer to the drain.  For a non-saturated transistor, the charge in the inversion layer is closer to constant across the channel.  Of course, these are APPROXIMATIONS.  Simulators use a more thorough charge-storage model than this simple relationship.

Besides, U0 could be found directly inside the model itself as in https://github.com/imr/ngspice/blob/master/examples/xspice/table/modelcards/modelcard.nmos#L55

Somebody had to put it there!

[promach]

Do you guys have any idea how to compute value of Cox using https://github.com/imr/ngspice/blob/master/examples/xspice/table/modelcards/modelcard.nmos ?

Could anyone show ?

[Wimberleytech]

Do you guys have any idea how to compute value of Cox using https://github.com/imr/ngspice/blob/master/examples/xspice/table/modelcards/modelcard.nmos ?

Could anyone show ?

EPSROX*8.854e-12/TOXE

[promach]

Cox = e0*er / Tox

Where is the missing parameter "area" ? I suppose capacitance equation is something like C = e*A/d

Besides, someone told me that calculating gm and ro by hand will not be very useful. What do you guys think ?

No matter what, using wxmaxima software, I have also came up with the extremely long expression of Vout/Iout which I am still not quite sure how I would use it effectively. Almost all parameters are both in nominator and denominator of the expression, this makes mosfet sizing decision very difficuly indeed.


\[ node\_1: V1/ro4 + gm4*V1 + (V1-V2)/ro6 + gm6*(Vin-V2) = 0\$ \]

\[ node\_2: (V2-V1)/ro6 + (V2-V3)/Rs - gm6*(Vin-V2) = 0\$ \]

\[ node\_3: (V3-V2)/Rs + (V3-Vout)/ro5 + gm5*V3 = 0\$ \]

\[output\_node: -Iout + gm3*V1 + Vout/ro3 - gm5*V3 + (Vout-V3)/ro5 = 0\$ \]

\[ sol: linsolve([node\_1, node\_2, node\_3, output\_node], [Vout, Iout, V1, V2, V3])\$ \]

\[ Rout: Vout/Iout,sol,factor; \]


\[
\frac{ (\mathit{ro3} (\mathit{Rs}\, \mathit{gm4}\, \mathit{gm5}\, \mathit{gm6}\, \mathit{ro4}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm4}\, \mathit{gm6}\, \mathit{ro4}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm4}\, \mathit{gm5}\, \mathit{ro4}\, \mathit{ro5}\, \mathit{ro6}+\mathit{Rs}\, \mathit{gm5}\, \mathit{gm6}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm6}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm5}\, \mathit{ro5}\, \mathit{ro6}+\mathit{Rs}\, \mathit{gm4}\, \mathit{gm6}\, \mathit{ro4}\, \mathit{ro6}+\mathit{gm4}\, \mathit{ro4}\, \mathit{ro6}+\mathit{Rs}\, \mathit{gm6}\, \mathit{ro6}+\mathit{ro6}+\mathit{Rs}\, \mathit{gm4}\, \mathit{gm5}\, \mathit{ro4}\, \mathit{ro5}+\mathit{gm5}\, \mathit{ro4}\, \mathit{ro5}+\mathit{gm4}\, \mathit{ro4}\, \mathit{ro5}+\mathit{Rs}\, \mathit{gm5}\, \mathit{ro5}+\mathit{ro5}+\mathit{Rs}\, \mathit{gm4}\, \mathit{ro4}+\mathit{ro4}+\mathit{Rs})) }

 { (\mathit{Rs}\, \mathit{gm4}\, \mathit{gm5}\, \mathit{gm6}\, \mathit{ro4}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm4}\, \mathit{gm6}\, \mathit{ro4}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm4}\, \mathit{gm5}\, \mathit{ro4}\, \mathit{ro5}\, \mathit{ro6}+\mathit{Rs}\, \mathit{gm5}\, \mathit{gm6}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm6}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm5}\, \mathit{ro5}\, \mathit{ro6}+\mathit{gm4}\, \mathit{gm6}\, \mathit{ro3}\, \mathit{ro4}\, \mathit{ro6}+\mathit{gm3}\, \mathit{gm6}\, \mathit{ro3}\, \mathit{ro4}\, \mathit{ro6}+\mathit{Rs}\, \mathit{gm4}\, \mathit{gm6}\, \mathit{ro4}\, \mathit{ro6}+\mathit{gm4}\, \mathit{ro4}\, \mathit{ro6}+\mathit{gm6}\, \mathit{ro3}\, \mathit{ro6}+\mathit{Rs}\, \mathit{gm6}\, \mathit{ro6}+\mathit{ro6}+\mathit{Rs}\, \mathit{gm4}\, \mathit{gm5}\, \mathit{ro4}\, \mathit{ro5}+\mathit{gm5}\, \mathit{ro4}\, \mathit{ro5}+\mathit{gm4}\, \mathit{ro4}\, \mathit{ro5}+\mathit{Rs}\, \mathit{gm5}\, \mathit{ro5}+\mathit{ro5}+\mathit{gm4}\, \mathit{ro3}\, \mathit{ro4}+\mathit{gm3}\, \mathit{ro3}\, \mathit{ro4}+\mathit{Rs}\, \mathit{gm4}\, \mathit{ro4}+\mathit{ro4}+\mathit{ro3}+\mathit{Rs}) }
\]

[The Electrician]

If M3 and M4 are identical, and M5 and M6 are identical, that fact will reduce the size of the expression, but you will probably have to plug in some numbers and see what you get.

[Wimberleytech]

Cox = e0*er / Tox

Where is the missing parameter "area" ? I suppose capacitance equation is something like C = e*A/d

No, for transistor models, Cox has units of f/m²

In the simulator, area is derived from the transistor instantiation line (e.g., W and L).

[Wimberleytech]

Besides, someone told me that calculating gm and ro by hand will not be very useful. What do you guys think ?

It is reasonable to calculate gm by hand...assuming a long-channel device (as opposed to short channel), but ro is a crap shoot by hand.  You can do rough approximations in the design process but must rely on the simulator to do a better job.  Designs should never depend on an accurate ro anyway.  In fact, you should not depend on an accurate anything other than matching.

[promach]

It is reasonable to calculate gm by hand...assuming a long-channel device (as opposed to short channel), but ro is a crap shoot by hand.

What do you think about http://asco.sourceforge.net/doc/ASCO.html#SECTION00220000000000000000 ?

or in general  http://ngspice.sourceforge.net/docs/ngspice-manual.pdf#page=435 ?

[promach]

Is it possible to derive the absolute numerical value of lambda(λ) from the mosfet model files ? Could anyone show how to do so ?

Alternatively, could I just use https://github.com/imr/ngspice/blob/master/examples/xspice/table/modelcards/modelcard.nmos#L38 directly ?

Besides, what does  TOXE = 1.8E-009  actually give ?  1.8*10^(-9) ? I asked this because I saw  LC = 5E-9  in the same file

[Wimberleytech]

Is it possible to derive the absolute numerical value of lambda(λ) from the mosfet model files ? Could anyone show how to do so ?

Do you mean: run a simulation of a mosfet using the model file and from the results, calculate lambda?  Yes you can get an approximation at an operating point.  Not sure that is what you are asking, however.  If not, ask again in a different way.

BTW, unless it is a homework problem, trying to get the "exact" value of lambda (CLM parameter) is a useless exercise.

Alternatively, could I just use https://github.com/imr/ngspice/blob/master/examples/xspice/table/modelcards/modelcard.nmos#L38 directly ?

The lambda in that model is NOT the "channel length modulation" parameter.

Besides, what does  TOXE = 1.8E-009  actually give ?  1.8*10^(-9) ? I asked this because I saw  LC = 5E-9  in the same file

yes,  1.8E-009  is   1.8*10^(-9)

[promach]

How do we obtain the channel length modulation parameter, lambda from https://github.com/imr/ngspice/blob/master/examples/xspice/table/modelcards/modelcard.nmos ?

The lambda in that model is NOT the "channel length modulation" parameter.

Then what is that lambda for ?

[promach]

No matter how I measure the output impedance, the result can never come any close to the following theoretical calculation. Could anyone point out if my output impedance test circuit setup is wrong ?

https://github.com/imr/ngspice/blob/master/examples/xspice/table/modelcards/modelcard.pmos

Code: [Select]

*CMOS inverter

.PARAM V_SUPPLY = 3.3
.PARAM V_OUT = 2
*.PARAM INP_FREQ = '#INP_FREQ#'
*.PARAM INP_PERIOD = '1/INP_FREQ'
*.PARAM NO_PERIODS = '4'
*.PARAM TMEAS_START = '(NO_PERIODS-1)*INP_PERIOD'
*.PARAM TMEAS_STOP = '(NO_PERIODS)*INP_PERIOD'
.PARAM AC_POINTS = 10
.PARAM AC_START = 1000
.PARAM AC_STOP = 1E6

*** *** SUPPLY VOLTAGES *** ***
VDD VDD 0 'V_SUPPLY'
VSS VSS 0 0

*** *** INPUT SIGNAL *** ***
VSIG IN VSS 0
** VSIG IN VSS AC 1 DC 'V_SUPPLY/2'

*** *** CIRCUIT UNDER TEST *** ***
MP OUT IN VDD VDD P1 W=2U L=2U
MN OUT IN VSS VSS N1 W=1U L=2U

** CL OUT VSS 3p
** RIN IN VSS 1G

CIN IN VSS 1E9
Rf OUT IN 1E9
** Lf OUT IN 1E-12
** The input can be either biased with a DC source, or a DC feedback circuit. Using a DC feedback circuit (RC, inductor, whatsoever) makes only sense if there's no DC voltage source, see [url]https://www.edaboard.com/showthread.php?377214-Noise-in-CMOS-Inverter&p=1617292&viewfull=1#post1617292[/url] 

*** *** ROUT TEST SIGNAL WITH FIXED 1A CURRENT AND VARIABLE TEST VOLTAGE (VOUT) *** ***
*VOUT VOUT 0 'V_OUT'
*** *** IOUT flows into the output of the circuit under test, so negative terminal node of this current source is OUT instead of VSS
IOUT VSS OUT AC 1

*** *** ANALYSIS *** ***
*.AC dec 'AC_POINTS' 'AC_START' 'AC_STOP'
*.TRAN 'INP_PERIOD/1000' 'NO_PERIODS*INP_PERIOD'
*
*.PROBE TRAN V(IN)
*.PROBE TRAN V(OUT)
.OPTION POST PROBE ACCURATE
.include modelcard.nmos
.include modelcard.pmos

.control
*AC dec 'AC_POINTS' 'AC_START' 'AC_STOP'
AC dec 10 1000 1E6

let ROUT=OUT/abs(i(VSS))
plot ROUT
print ROUT > ROUT.log
.endc

.END

[promach]

@Wimberleytech

I have solved the ASCO problems with a simple CMOS inverter.  https://github.com/promach/frequency_trap/tree/development/optimization/inv

Now I am coming back to solve the ASCO optimization for output impedance of asymmetric differential pair.

1. How should I set the DC operating points for this asymmetric differential amplifier pair ?
2. For DC analysis, should I connect the IN and OUT to a feedback circuit which is the CMOS inverter in this case ?
3. Do I do the same for AC simulation for output impedance after determining the DC operating points ?