i'd say it has to do with millions of latched type circuits holding 1 or 0 inputs.
like latching logic chips, flipflops, etc. am i close?
Yes, for SRAM. But there are heaps of other technologies.
For most DRAM it is little leaky capacitors, holding charge while they are regularly topped up by refresh cycles.
For Flash it is a static charge/electrons that have tunnelled themselves into a little pocket above a FET junction, holding the gate open or closed.
For ROM it can be constructed that way, with metal connections on the silicon chip that encode what data will be read back.
For PROMS it might just be fuses that are blown when it is programmed.
There there is phase change memory and a whole lot of other exotic stuff like core memory