How transistors work

[Legion]

Wow guys.  Great posts.  This is amazing!  Probably the best explanation of how transistors work that I've read.

[EEVblog]

Wow guys.  Great posts.  This is amazing!  Probably the best explanation of how transistors work that I've read.

Yep, I agree, this thread is just brilliant, well done to all!

Dave.

[free_electron]

Here is a bit of information on how they are constructed.. Let's see if i can remember all of this...

We start with a wafer of pure silicon. Silicon is a semiconductor element. This means that it can be made to conduct , or isolate depending on how you treat it , or apply voltages to it.
Wafers are available pre- doped with a donor or receptor material.
The silicon wafer is cut from a massive block of silicon that is pulled , much like you pull a candle from wax. They start with a furnace and put blocks of refined siliocn. They can add the dopant at this time.
The whole thing is heated in a blast furnace under a nitrogen atmosphere ( we don't want any oxygen in there as siliconoxide is a perfect isolator ... ) when the full thing is liquid we introduce a seed crystal.

Silicon, in its natural state is a crystalline structure , much like iron... A silicon atom wants to have 8 electrons on its outer shell but it has only 4. So it interlocks (shares) with electrons from neighbouring silicon atoms. This bond creates the crystalline structure.

The seed crystal is a tiny block of silicon that is a pure crystal. There are no cracks or irregularities in the crystal structure. It is no larger than the head of a pin...
It is fused to a carrier rod and clamped in the rotor. Assembly of a motor. This motor runs at a certain speed and spins the seed crystal around. The crystal structure is not put on its flat side , but under a slight angle ( i will explain later why we need this ) . Think of it as the tower of piza. Instead of having the atoms all perfectly next to each other in horizontal and vertical , we tilt the crystal under a slight angle.

Now, above this pool of liquid silicon we place a hollow tube in the shape of a donut and we pump coolant through it. The seed crystal is poked through the centre of the donut and placed on the surface of the liquid pool of silicon , as we spin it around slowly. At the surface intersection between the seed crystal and the liquid pool of silicon we succeed in melting a bit of the seed crystal.. Just a few atoms. Now we start ' pulling upwards through the hole in the donut. Since this is a cold zone the material solidifies there. We keep spinning around our axis while slowly moving upward as well. The end result is that we are growing a conical shape of silicon , starting from the seed crystal. Every layer of atoms that is added is in perfect alignment with the crystal structure of the seed crystal.

The 'donut' can actually expand. We can make this center hole bigger. This allows us to set the end diameter. For example a 4 inch rod , or a 6 inc or a 300mm rod. Once the 'cone' has reached the desired diameter we stop enlarging the donut , but we keep spinning the crystal and moving it in an upward motion. It takes a few days to grow the 'ingot' ( thats what we call such a rod of crystalline sillicon). They can be up to 2 meters long , 300 mm in diameter and weigh almost a ton. And ot is suspended from a tiny crystal that is only a few millimeter diameter.. The pull strength of silicon is fenomenal.

By far the largest producers of these silicon ingots are Dupont and Wacker. Those two combined do more than 90% of what is used.

This ingot is then cut usin a steel wire coated in diamond powder and polished to an extremely flat surface. The orientation of the crystal is marked by shaving off one side of the culinder. So the otherwise perfect round wafer has an flat region. We simply call this the 'flat'. Whenever process steps are done later they are aligned to this flat. You simply spin the wafer until it lands on the flattened portion and it stays there. The whole process of pulling a silicon ingot is called the Chrowalski method ( i hope i spell it right.. Polish name )

Right. Now we have a wafer of silicon. Off to the cleanroom with it.
The first thing we need to do is create doped regions. We can do this side by side , or we can stack them vertically. In 'the old days' and for some single transistor technologies we still construct vertically. To do this construction we need a pre-doped wafer. For horizontal construction ( called the planar process, because we work in one plane), like for integrated circuits, we do not use a pre- doped wafer.

Lets look first at the vertical process.
We have a wafer that is alread predoped. Lets say we start with an n- type doped wafer. The material has an excess of electrons ( free electrons ) because we introduced a donor material during the creation of the ingot.
We will put the wafers in a quartz carrier called a 'boat' and shove them in an oven. This oven is a long quartz pipe surrounded by very powerfull infrared heaters. We pump down the interior of this oven to vacuum and introduce a gas carrying silicon atoms. The carrier gas can be hydrogen or nitrogen. ) we also introduce a gas carrying a dopant material. We can play with the mix ratio to create stronger or weaker doped material ( remember my explanation of the transistor , the base is weaker doped than the collector).

The intense heat breaks the molecular bonds of the gases and the silicon atoms and dopant atoms fuse at the surface of the wafer. Temperature control is extremely critical... 1/100 of a degree c too much and the wafers melt and end up in a puddle in the floor of the oven, 1/100 too low and nothing happens...
 So we are steadily growing, on an atomic level , a layer of new material. The time we do this determines the thickness. Typical oven runtimes are 6 to 8 hours including temperature ramping...

Once we have grown this first layer. The wafer goes off to the photolitho room. Just like you make a printed circuit board , the wafer is coated with a photoresist and exposed to a negative image under a uv light source. There are a few peculiarities though... We don't use ( i always say 'we' because i work in this business. I started in a waferfab  19 years ago doing maintenance on these machines and now work in the design of the chips.. So i am familiar with how this stuff is all done in 'intimate' detail) don't use plastic film as a negative. The optical distortion is too high. The 'mask' is a quartz plate that has aluminum vapor deposited on it and engraved with either a laser or an ion mill ( a beam of ions is used to 'cut' and evaporate the alumium. )
This mask is not 1:1 scale but larger. Typically 1:40 ..
The quarts plate holds the image for a number of transistors side by side in a matrix arrangement.
The photoresist is exposed to this image using a lens system. Alignment is key and the machine that does this 'steps' over the wafer. That's why we call it a stepper. In the old days when geometries were big and wfers small we could actually expose in 1 shot. With todays large diameter wafers the distortion in the lens , and the size of the mask, becomes unusable, so we resort to stepping.
We also dont use normal ultraviolet light, but 'deep uv'.. This is typically made using an x-ray source that bombards a globe comtaining a gas. The reason is that, at the scale we work , the wavelength of UV is too large to go through the small openings in the mask in a 'clean' way... You create 'shadows'. The wavelength of regular uv is too large.
The power of these light source is also a tad brighter than you household pcb exposure unit... We need about 1/3 of a second exposre and we are done ...

Now, the photoresist is developed and unexposed regions are washed away ( we use negative process... As opposed to positive in home pcb making... )

Off to etching we go.
The areas not covered with photoresist will now be etched off. So we are now selectively removing part of our deposited layer... Two methods are in use. Wet etch and plasma etching.
Wet etch uses very nasty stuff like hydrogen fluoride and other chemicals to eat away the unwanted areas. Wet etch has a problem.. As geometries become smaller you get the problem that the liquid does not want to enter the little openings , or cannot be substantially refreshed to guarantee an even etch-rate all over the wafer. If you are familiar with etching you own pcb : some areas eat away fater than others. We cant have that... The geometries are too small and the risk of 'over etching is too large.. So, we switched years ago to a different technology : plasma etching...
We place the wafer in a pressure ( actually a vacuum ) vessel and pull a high vacuum. We introduce a reactant like silicontetrachloride or some other gas. The gas is inert and does nothing by itself... And themwe give it a swift kick in the pants by unleashing a few kilowatts of rf energy (13.56mhz industrial transmitters ) across it... This creates a plasma and rips the gas molucules apart. All of a sudden we get highly reactive atoms that start bonding with the material,we want to'eat away,. A continous stream of etching gas is injected while a big pump keeps extracting it. This plasma cloud is not uniform ...  It is a swirling soup of highly reactive elemnts.. To make it uniform we need.. A blender... Fortunately plasma reacts to magnetic fields. So we place two coils around this plasma chamber and send two 90 degree out of phase waveforms throught the,. This creates a spinning magnetic field that 'blends' the plasma cloud and creates a uniform reaction rate all over the wafer.

The etching precision is also much higher because we can pull another trick... When you etch a pcb you determin when to stop by looking if you can see through the board, or by time ..
Our structures are so small that this doesn't work .. And the wafer is not transparent. But we have another indicator. Plasma emits light... And the color of the light is determined by what materials are present in the plasma. So , we have a fiberoptic in the chamber that brings this light out, sends it through a prisma to break it in spectral lines and looks at the intensity of every wavelength present.
If we know we are etching silicon doped with phosphorous we look at the intensity of the 'phosphorous' spectral line. When all is gone ( we have etched through the layer and are now at the base of the wafer ) thie amplitude of this spectral line collapses ... Endpoint !
So these etchers actually employ a gas chromatography technique to find out when there is still stuff to eat , and when not... This gives a very precise etching method.

Right.. We now have a n type wafer with p type structures on top ... And a photoresistlayer... That has to come off.
When you make a pcb at home you now bring out the bottle of your wifes/girlfriends/own nail polish remover ( acetone) and you wipe it off.

We need a bit more precision... Averything needs to be absolutely clean...
So we use .. Strippers! No, not the pole-dancing type ... The technical name is an 'asher'.

Just like we used a plasma etcher to eat the unwanted material , we can use plasma to eat the photoresist. The 'etchant' this time is pure oxygen... We simply 'burn' it off in a plasma chamber. These machines are less advanced than real plasma etchers and simply use timed endpoints.
Although recently there are etchers that can do both. They etch first , when endpoint is detected they fully evacuate the chamber , switch to a different gas and eat the resist. The problem is that this does not work for all chemistries. The chamber walls need to be able to withstand both 'etchants'. Only etchers with amagnetical confinement field can do this as the magnetic field keeps the reactive plasma from touching the reactor wall and eating that one away too ...

Right. Now we have or second layer.. Well... Lets do it one more time. Back to the oven , deposit a layer of n material, slap some paint on it ( photoresist ) expose, develop , eat , wash and rinse.
Tadaaaa . A verical npn stack.
Now we have a tiny problem. Since the wafer we started with was doped .... All our transistors share a common electrode... This can be fine if you use a chip technology like rtl ( resistor transistor logic ... ) all emittors are tacked to a common ground there anyway... The trouble starts if you need a 'floating' transistor. For loose transistors you dont care either way. So lets first look at what happens if we were simply after making individual transistors that will packaged as a 3 pin device and sold as. A 2n2222 or b547 or whatever...

We need a way to fix the electrical connections. So we better put a mtal layer on top of our construction. Off to the sputtering machine we go...

Byq the way : this stack we made is not uniform... The bottom piece is wider than the middle pice which is wider than the top piece

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So now we will deposit a thin film of aluminum using a sputtering machine. The wafer is placed on a water cooled chuck and a bell is placed over this. In this bell sits a solid block of aluminum and a tungsten electrode. We pump down to vacuum , introduce an 'igniter' gas ( krypton, xenon ) and we strike a high voltage arc between electrode and aluminum block. This evaporates the aluminum and this cloud of gaseous aluminum lands on the cold wafer where it solidifies and grows a uniform layer of aluminum. Now, you have to remeber that our 'wafer' actually holds a 3d structure .. So this layer of aluminum is uniform in thickness, but it does follow the mountains and valleys on the surface of the wafer...

Layer thickness is given by time.

After this deposition we go back to lithography , apply another photo,ask, develop and back in the etcher where we remove the unwanted bits of aaluminum. Send it through the stripper one more time and.. Tadaaaa : a usable transistor.

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So now we put our wafer in an adhesive rubber foil, bring out our dremel tool with diamond powder coated sawblade and we will cut up the wafer. The individual transistors stick to the rubber foil. The saw does not go through the rubber ( oscillating sawblade, like when they remove the cast around your broken leg. The blade only cuts hard stuff , not soft stuff )

Once we are done we stretch the rubber so the transistors separate ( this sawblade is extremely thin ... After all , anything we saw away is pure loss of silicon area... And the cost of a device is determined purely by its surface area...)

Amd now have a pick and place machine that picks a transistor 'die' off the rubber carrier , places it on a leadframe and friction welds it ...

Ah drat... I forgot a few steps ..

Back to the wafer wafter metal etching ,just before sawing....
The wafer is too thick .. We are fist going to grind the backside down in a wafer 'lapper' ( commonly called a 'disco'. Think about saturday night fever spinning balls ... Bingo. The wafers are spun aroundtheir axis while a counterrotating grindingdisk ( diamond dust... ) grinds off the backside.
The last thing we do is actually deposit another layer of aluminum, but this time on the backside of this thinned down wafer.

Off to cutting ..

Right the individual transistor is picked up and placed on the leadframe. The is a stamped preform of the three pins. Inside the transsitor the pins are terminated in little paddles with the emitter paddle being larger than the actual 'die'. I am talking packages like to92 sot 23 et all.. For metalcan packages like to39 to3 there is no leadframe.. We weld directly to the can.

The tool holding the transistor die is mounted on an ultrasonic piezoelement. So we can vinrate this transisotr wildly while pressing it down on the
Arge paddle of the leadframe, or the metal can. The friction melts the aluminum on the backside and presto : a welded transistor. And you have an instant emitter connection as well ( thats why metal cans are connected to the emitter .... ) of course you have a very thick emitter there so we add a bondwrie from the top emitter electrode to the leadframe or metal can as well to decrease resistance...

Some constructions do not use an aluminum backside but weld the die down with a silver glue. Isolated transistors insert a alumium oxide disk between metal can and die.. There are many ways to skin a cat here... Every manufacturer has his own way...

All that remains is jow to 'bond the two other electrode ( collector and base ) to their pins. In the old days we used gold , these days alumium, and for some specialty stuff also copper or still gold .
Bonding is also ultrasonic. Hold the wire , vibrate it so you get friction = heat . Wire diffuses intovdeposted aluminum electrode. Pull wire up and onto other connection point, repeat and cut.

Since the electrode on the transistor sivery small we ned to have a clean termination there. So advanced bondingmkachines actually pull an arc to the end of thee wire to create a nice round ball there. Think of itmas taking a piece of solder, heating the end so you get a little ball there ).

This guarantees a niece, precise shape and bond without risk of touching anything else. On the other side ( the paddle or pins) the structures are large and you don't need this.

Right so now we have made vertical transistors. ( point contact is older technology and skips the aluminumdeposition and bonding altogether. We simply poke two needles , one on gate and one on collector and use the mechanical pressure to hold the emittor in contact... )

Back to simple chips like rtl logic where all emitters are connected and all transistors are the same type. You can make a resistor using a piece of doped material. So these are made in the top n layer. The underlying p layer is shorted to the emittor to 'kill off' the transistor structure. You still have a diode between the tesistor channel and the substrated but this one sits reverse polarized and does nothingf.. Hmm thismmerits a drawing... Will have to wait until tomorrow.

To construct pnp transistors you could grow another layer of p material but you would also need an isolating layer. There were chips that were built this way but the yield was low and quality bad. Remeber this was early 60s and layer thickness control was not very good. Everything was experimental and everything was done by 'technicians' since there were no engineering courses in this stuff.. Funny isn't it ? All this stuff was invented by people without proper education ...

Right.. Now at one point some very clever people ( Robert Noyce , yes the guy that started intel , Jean Hoerni and a few others) came up with another idea.... The planar process. They had heard about a particle accelerator and thought.. What if we shoot dopants where we need them ? We can start with an undoped wafer and just blast donor and receptor impurites where we want them , in the right shape and with the right dosage ! The planar process was born.....

But that is a story that will have to wait until tomorrow...
I have to dig around in my garage. I have a box somehwere with masks, wafers, cut wafer on the runber foil, leadframes and tons of other stuff. I have a 15 minute video too that i made one day in the waferfab. We had an open-house day once and i got permission to film in the fab all the process steps. We showed this video at the entrance before the tour. It was filmed with a DV camera and i have it in DVD format somewhere.... I will need to get permission to release it... Should be doable. If i get permission i will upload it to youtube. It actually starts with sand refining , the pulling of the ingot and so on.

[PetrosA]

Excellent work! Thanks! It enables me to visualize how my Foveon sensors are made

[caroper]

It is amazing that something so complex can be sold for a couple of cents.
You have certainly put payed to any ideas of a DIY home Fab Lab
Great reading, you really should write a book.


Cheers
Chris

[IanB]

You have certainly put paid to any ideas of a DIY home Fab Lab

Well you can't make a useful transistor at home, but you can certainly make a functioning device as an educational experiment. Though apparently there are some practical details that may be a bit tricky to figure out.

[free_electron]

right. here's 'the second part'

so far i've covered 'the old way'. time to move on to a more practical manufacturing method : the planar process.
instead of stacking layers by growing them in oven , selectively eating them back off , growing another layer , eating it again and so on .. why don't we just deposit material where we want it ?

the photomask can't withstand the extreme temperatures in the oven .. finding a photoimaging chemical that can ... none found so far. so how can we get this thing accomplished ?

well , why don't we just shoot the dopants where we want them ? enter : the ion-implanter.
this is a big particle accelerator that can fire a beam of the selected material at the wafer. if we aim it right , under a slight angle so it can easier fly in the crystalline structure it'll lodge itself in the grid. the faster we make the material fly ( the more energy we give it ) the deeper we can shoot it... and the longer we expose the wfer to the beam the more ions we get in there.

wow. we can control not only the amount of doping ( remember we need weakly doped and heavily doped area's to make different parts of the transistor ) but we als need to be able to make thick areas to conduct large currents ... and that is depth control..
and since the machine does not care what it needs to fire .. we can shoot both donor and receptor material .. looks like a winner !

so how does this mythical machine work ?  very much like an old tv tube. with one difference : instead of firing electrons we fire ions...

In a long vacuum pipe ( this thing is 8 or 9 meters long ... ) at one end a heating element (tungsten) heats up to a very high temperature and is placed at a large negative voltage. we now introduce a carrier gas with the doping element of choice (fosfine , arsine , boron or antimony )

the high temperature breaks the molecular bonds and the intrdouced material falls apart in loose atoms. Now , about 10 centimeters away we place a round electrode with a hole in it. this is the extracting electrode. the negatively charge atoms ( ions) see this electrode and they go for it .. unfortunately for them , right behind his first electrode is a second one ... with an even higher potential... so they go through the hole towards this second one , which also has a hole in it .. and you guessed it . there is a third electrode . .by this time they are going so fast they don't defelct anymore , they just go faster .

now we have a bit of a problem. so far , we are just firing off watever we have ... hydrogen ( the carrier gas ) ,the dopant , bits of the tungsten filament .. we can't have that... so wee need a 'filter'. Enter : the mass analyzer.
we bend our vacuum pipe 90 degrees and we place a big electromagnet around this bend. And i mean BIG ... drive current : kiloamperes ..
Ions can be influenced by magnetic fields. The path of the light materials are bent very much, the path of the heavy materials very little.
as hydrogen is light , it is bent very sharply .. much sharper than 90 degrees and it hits the wall of the tube ... game over.
the heavy materials like tungsten are bent only slightly , so they cant make the 90 degree turn and hit the opposite wall. only the 'appropriate material can make a perfect 90 degree turn. This is why the tube needs to be so long... by playing with the magnetic field we make sure that only the selected ions make the correct 90 degree turn... any tiny little bit off and you end up in the tube all as opposed to flying out of the other side....
the magnetic field has slowed down the ions a bit so we throw in a couple more accelerator electrodes  and we pump up the speed to 120keV or 160 keV or sometimes more.
to bundle the beam we use an electronic 'lens' basically an electrode where apply a high voltage with the same sign as the ion charge. like charges repel. wo we can narrow the beam , or allow it to expand.

so now we have a very fast travelling beam of a particular ion. this beam carries a lot of energy and could destroy whatever structure we try to create. we also need a means to sweep the beam over the wafer surface.

We know ions are defelected by magnetic field. so we place two scanning magnets ( tow electromagnets under 90 degree angles ) and , much like old tv , we apply two sawtoothwaves , one for horizontal , one for vertical .. now to get rid of the charge .. you don't want that do disperse in your small structures .. you woudl fry them.. so we have a floodgun that floods opposite chare onto the beam just before it exits the tube. this neutralizes the electric charge and the ion reverts to being an atom ... chargeless and harmless, but flying very fast ... right against the surface of a wafer... in to it and permanently lodged where we wanted it.

and there oyu have it  : implantation of dopants !

Now, how do we do this selectively ? photomask ! the thcikness of normal fotomask turns out to be sufficient to trap the atoms.
where there is photomask the atoms are trapped and do not reach the wafer .. where there is no photoask they fly straight in.

so , just like we did in the old process we employ photomask. but this time a negative variant. in the oldprcess the mask protected the areas we wanted to keep after etching.
On the ion omplant process the mask protects the area's where we do NOT want the doping to take place.

wash , rince, repeat ..
the remainder is the same : metallisation has not changed.
the growing of oxide has not changed. ( oxide is used to construct the gates of the mosfets )
sometimes you need  nitride step , some steps are vapour deposition.

but you don't need all the deposit , etch , deposit etch steps. especially the dposit steps : they take a long time ( 7 to 8 hours in the oven ... )
and you get more precision ! nd its a lot faster. wafer exposure is in the order of minutes...

there is a little caveat though .. all this 'force' has a tendency to break the crystal structure a bit. And we can't really shoot very deep.. if we go too hard we would fly through the fotomask... so we need a bit of a post processing step called 'drive-in'
we throw the wafer in a hot oven and this 'heals' the crystal structure and allows the atome to 'settle' and 'sink-in'.

so yes, there is still a long run in the oven , but there is only one. we gain speed ,and we do not subject the wafer so many times to thermal stress ...

[M. András]

how can the leads of these fests handle those currents which some big fet claims? 2-500amps even to-247/264

[Kremmen]

Not to mention the bonding wires inside the package, connecting the silicon to the external leads.
Some tens of amps, maybe if the leads are cooled to the PCB tracks but hundreds - i don't think so.

[SeanB]

Normally multiple bond wires, or a foil strap. Just remember that a lot of these ratings are a pulse rating, and can be considerably larger than the DC ( or 100/120Hz as it will be effectively DC as far as bond wire heating is concerned) current in the datasheet.

[free_electron]

Not to mention the bonding wires inside the package, connecting the silicon to the external leads.
Some tens of amps, maybe if the leads are cooled to the PCB tracks but hundreds - i don't think so.

you can do 60 ampere on bondwires. a single bondwre if 1 mil thickness wil lhold 4 ampere without problems. put 14 or 15 in parallel and you are there...
those high current transistors sometimes employ double dies.

the cross section of a to247 pin can handle quite a lot of current. you cannot compare this to wire you put in the wall... the reason they restrict 20 ampere through a 2.5mm2 wire is because there is quite a bit of drop (long wire .. more ohms  ), there isolation around it and it sits in a confined space...
the to247 pin is bare metal...

a IXTV280N055T for example will do 280 ampere ... but look at the specifications of those pins ... that is a very fat pin ... and ... that 280 ampere is provided you can keep the junction at 25 degrees .... it's gonna be a short pulse at that rate ... your RMS current is going to be much much lower .... so yes , the pin will hold that.

other fets are made for direct bonding to an alox substrate and will go waaaaay beyond that

[SeanB]

OT, but a 0.5mm copper wire can do 30A plus, although it will act as a shantytown streetlight at that current. You can see some glow during the day as well, bare wire at chest height with earth return.

[free_electron]

ah, yes that's another trick. for high currents they don;t use aluminum bondwires anymore ... its copper and gold

[Technoguy3]

Thank you very much, free_electron. Out of reading countless explanations and watching videos on HOW transistors work, you just cleared it up for me in a matter of minutes.

Why does every engineer try to explain higher levels of abstraction first? I need to understand HOW something is physically working. If I don't, then I simply can't go further. It's why computer science instructors can't explain programming to me. They never want to explain what is physically happening. Just like math, electronics engineering should be taught from the bottom up, not the other way around. You can't expect a kindergartener to understand quadratic equations without first understanding the number system, counting, addition, and subtraction. I can neither understand quantum mechanics, electron spin, and equations for determining it, without first knowing what an electron is!

[IanB]

ah, yes that's another trick. for high currents they don;t use aluminum bondwires anymore ... its copper and gold

Ironically the main high current feed bringing electricity into my house has aluminium conductors. Perhaps they decided that copper wires with 100 A capacity were too expensive... 

[free_electron]

yep . they used aluminum wires for a while . cheaper than copper. but they stopped soing that... fire hazard. not in the cable itself but twhere the cable is terminated.
terminating unlike metals by pressure is a bad idea. making a gastight aluminum crimp is problematic. aluminu oxidizes very quickly and aluminum oxide is a reallky good isolator....
so you get contact resistance.. combine that with large current and ... P = I*I*R .... where P can be expressed in joules .... or heat ...

@technoguy3 : Mathematics is just one of the 'modeling' mechanisms at our disposal. some people, including me, are more visual oriented. I always liked how richard Feynman did it. As someone was explaining something he would make analogies in his mind. ah , this is a ball , no wait, two ball circling each other , one blue , one green . Now the green one grows hair ... and so on....
No point in beginning with massive equations. start simple and work your way up.

[T4P]

yep . they used aluminum wires for a while . cheaper than copper. but they stopped soing that... fire hazard. not in the cable itself but twhere the cable is terminated.
terminating unlike metals by pressure is a bad idea. making a gastight aluminum crimp is problematic. aluminu oxidizes very quickly and aluminum oxide is a reallky good isolator....
so you get contact resistance.. combine that with large current and ... P = I*I*R .... where P can be expressed in joules .... or heat ...

@technoguy3 : Mathematics is just one of the 'modeling' mechanisms at our disposal. some people, including me, are more visual oriented. I always liked how richard Feynman did it. As someone was explaining something he would make analogies in his mind. ah , this is a ball , no wait, two ball circling each other , one blue , one green . Now the green one grows hair ... and so on....
No point in beginning with massive equations. start simple and work your way up.

I am still baffled and wondering why the A380 has been wired using aluminium wires ... EH?!

[SeanB]

Aircraft electrician is generally a much better trained and more careful worker. That means the cabling can be prepared properly for termination, and the connectors will be a much more expensive alloy that is less likely to corrode in contact with the aluminium. Plus the regular maintenance cycle and the connectors being designed to keep the contact areas dry and sealed does help.

That will probably reduce the wiring loom mass by a good few tons, even if it does increase the maintenance cost slightly and requires a special training cycle for the maintenance staff over what they already have.

Aircraft wiring is easy, 1 million wires in looms, all white, and all identified by illegible markers applied every 30cm along the wire. On the plus side the looms are often available in sections for easy changing if they are faulty, and there are plenty of plugs and sockets in it. Bad is some are make in situ due to clearances, and you need an extra elbow to do it easily.

[Kremmen]

yep . they used aluminum wires for a while . cheaper than copper. but they stopped soing that... fire hazard. not in the cable itself but twhere the cable is terminated.
terminating unlike metals by pressure is a bad idea. making a gastight aluminum crimp is problematic. aluminu oxidizes very quickly and aluminum oxide is a reallky good isolator....
so you get contact resistance.. combine that with large current and ... P = I*I*R .... where P can be expressed in joules .... or heat ...
[...]

They still do, at least around here low voltage powerline cabling (3 phase 400V supply) is done with aluminium as a rule.
The termination issue is true and it did cause problems until it was acknowledged that you just can't connect aluminium like you do copper. What is now done is that splicing and connecting to copper is done using a special spring-loaded clamp connectors with a hermetic aluminium-copper inteface where needed, and using a special grease to remove the oxide and protect the connecting aluminium surfaces. The spring tension takes care of the tendency of aluminium to creep and loosen the joint. This and oxidation created the fire hazard.
Properly done it works without problems. And at least around here the licensed electricians are well trained to understand the risks involved in aluminium cabling. I haven't seen reported problems and i am sure there are none.

[free_electron]

I am still baffled and wondering why the A380 has been wired using aluminium wires ... EH?!

aircraft is NOT house cabling !. they use aluminum simply because of weight !
They won't use crimp connections eather in aricrafts , and neither will they simply put a wire under whatever screw and tighten it...
they will probably weld the cable to an end lug and then put that under a gas-tight clamp plate.

And, as kremmen said : they'll apply some for of surface protectant.

The US and Canada did an experiment to use aluminum wiring in houses in the 80's.. now it is illegal to do this. simply becasue they had too many fires...
here is some reading material on the how and why : http://en.wikipedia.org/wiki/Aluminum_wire

[T4P]

I am still baffled and wondering why the A380 has been wired using aluminium wires ... EH?!

aircraft is NOT house cabling !. they use aluminum simply because of weight !
They won't use crimp connections eather in aricrafts , and neither will they simply put a wire under whatever screw and tighten it...
they will probably weld the cable to an end lug and then put that under a gas-tight clamp plate.

And, as kremmen said : they'll apply some for of surface protectant.

The US and Canada did an experiment to use aluminum wiring in houses in the 80's.. now it is illegal to do this. simply becasue they had too many fires...
here is some reading material on the how and why : http://en.wikipedia.org/wiki/Aluminum_wire

Right, thanks for clearing up. I forgot some things at a spur of the moment.

[M. András]

off
hahh, 3 years ago we still had aluminium wires in our home, till i replaced it with 2.5mm copper wires, dear god<- the only 1 word left my mouth when i removed the plastic cover of the breaker box 5 black wire 2 large diamater one 1 bigger then the other, 3 single 240volt wire, if i would dare to rewire it i would have a 3 phase connector, the horror continued, null/return+ground connections separeatly twisted to the larger diameter wire with burnt insulation and electrical tape from the 80s, replaced the breakers too.
off

[marcosgildavid]

Hi,
take a look at:

http://mosfet.isu.edu/classes/stout/EE%20329/

Chapter 5

There are some really good information in this docs, I've used them to study for my electronics course.

Hope it helps.

[cabraham]

http://amasci.com/amateur/transis.html

Don't let anyone tell you they are current controlled

Every bjt maker says they are current controlled, at least at the big picture viewpoint.  At the micro level, charge control models are employed.  I has a long exchange with Bill, the keeper of the web site you referenced.  I'll dig it up and provide a link later tonight.  Best regards.

Claude