The quoted OP doesn't understand transmission line theory, and only knows enough about impedance matching to be dangerous.
1. Most MCUs don't transition in fractions of a nanosecond. If this is an ATmega Arduino we're talking about, it's more like 5ns. Still more than fast enough to get into trouble with, but that's hard to achieve on 30cm runs.
2. For an instantaneous step, the pin driver's output resistance (which is actually like 50 ohms, but more exactly, about 70 ohms pulling up, 40 ohms pulling down) divides into the transmission line impedance. For a 100 ohm line, this is around 2/3 Vcc.
So we launch a wave front of 2/3 Vcc down the transmission line. One electrical length later, this wave arrives at the "load". (Which was never intended to be, and cannot be, a "load" in the RF sense!) It reflects off the load (because it has a high impedance, give or take the phase shift from its capacitance), and returns to the source.
3. When the wave reflects, it superimposes on itself. The transmission line is charged to 2/3 Vcc, and a wave of 2/3 Vcc now launches from the far end. The line charges to 4/3 Vcc. It overshoots.
If we have input protection diodes on the load, it will clamp this overshoot (this isn't really desirable, but it can happen). In that case, current is drawn from the transmission line, and somewhat less than 4/3 Vcc propagates back.
4. When this new level reaches the transmitter pin, it continues to transmit as a Thevenin source, but instead of a divider into ground, it's a divider into -- whatever level is on the line now, namely, 4/3 Vcc. Current is drawn out of the transmitter, and ((2/3)(1 - 4/3) + 1) = 10/9 Vcc reflects back again.
Now, some overshoot can be useful when the transmission line is long and lossy, but you shouldn't count on quite this much overshoot as a normal thing. You usually plan to source-terminate the transmitting pin with 33-100 ohms, to prevent overshoot in most situations.
5. This was for a point-to-point link. What if you have many loads along a linear bus? Well... each one sees the transmission line's levels, over time. Only the terminal load jumped from 0 right to 4/3 Vcc in an instant. For all other points on the line, all intermediate levels are seen: 0, 2/3, 4/3, 10/9, etc. This makes the risetime look lumpy, and can cause multiple clock events on input pins, screwing up your data.
Incidentally, this circumstance -- source terminated transmission lines -- is what limited Ye Olde PCI bus to a certain number of slots along the length of the motherboard, and a maximum clock frequency of only 66MHz.
Tim