The input circuit of those logic analysers is very simple:
- There's a 100k pulldown resistor to ground, to define the logic state of an unconnected input. That's where your 100k input resistance is coming from. This could be increased or removed, but then the display trace for any unconnected probe would 'flap in the breeze'.
- Following the pulldown resistor there's a series resistor of lower value, probably around 1k to provide some degree of overload protection to the input logic.
- Finally there's the input logic, typically a 74HC245 (strapped as input only).
The logic analyzer isn't outputting any voltage on the pins - what happens is that when you power it down, is that the input protection diodes in the 74HC245 are pulling your signals down via the series resistors. With 1k series resistors and 0.7V protection diode drop that's about 4.3mA load on a 5V signal (less at 3v3 obviously).
You could try increasing the value of the internal series resistors to, say, 10k (they will be small smd resistor arrays), however the higher the value, the lower the frequency of the RC low-pass filter that you create with the HC245 input capacitance (approx 5pF).
Your easiest solution is probably to include an octal logic buffer on your circuit (another 245?) powered by the target that won't mind its outputs being loaded a bit, and use its inputs as the probes instead.
General practice though is to power down the target, or remove probes, before powering off test equipment.