Input offset current for op-amp?

[alex.martinez]

Saludos!

I've been doing some projects with a TL081 op-amp, as these are quite sensitive to errors I have a good track about theoretical real values like the offset voltage and the input bias currents. However after taking a closer look at the datasheet I've noticed an additional paramenter "Input offset current", at first sight I though "well, it is probably the offset voltage divided by the input impedance since it is so small" but I am not sure about this. I've reaserched on the forum and on the internet but I don't find any clarification on the matter. I would be very thankful if anyone could explain me what is it.

Thank you for your time,
Alex.

[Aeternam]

Alex,

The input current offset is the difference between the input currents of the two inputs. If the input stages of the opamp were 100% identical, this offset would be 0. But alas they're not, Ios is usually between 1/2 and 1/10th of Ib. Because of Ios, the opamp will see a difference voltage between its inputs even when driven by identical source impedances.

[alex.martinez]

Alex,

The input current offset is the difference between the input currents of the two inputs. If the input stages of the opamp were 100% identical, this offset would be 0. But alas they're not, Ios is usually between 1/2 and 1/10th of Ib. Because of Ios, the opamp will see a difference voltage between its inputs even when driven by identical source impedances.

So I guess the best way to mitigate this effect is by accounting for it together with the bias current? I use a resistor network on the non-inverting input, so I guess I just should re-calculate the values and account for that input error.

[Messtechniker]

So I guess the best way to mitigate this effect is by accounting for it together with the bias current? I use a resistor network on the non-inverting input, so I guess I just should re-calculate the values and account for that input error.

Sure. OK for oneoffs. But the next opamp will have a different offset.
Better go for a low offset opamp, if a low offset is important to you.

[rstofer]

Maybe this will help:

http://www.ecircuitcenter.com/Circuits/op_ibias/op_ibias.htm

[Kevin.D]

The param :- Average input bias current ~ This is the small current that the Op Amp sinks/sources from it's input pins. It is defined as (I non inv + I inv) / 2 .


Due to this if you feed the Op's inputs from very different impedances you will create an unwanted offset voltage when this bias current flows through these different impedances. So try to keep the input impedance of the input circuitry the same on both inputs and the offset voltages will tend to cancel out.


Bias Input Offset current:- is the difference in bias current between the input pins. Now a lot of newer op-amps (like 0p07 op27 series) are designed with input bias current cancellation. For these parts the input bias current is a very low and temp stable  and the input bias offset current in these devices is nearly equil in size to the input bias current (thats how you can tell if Op is using internal  bias cancelation) . When these two params are nearly equal in magnitude you should not use impedance equalizing resistors in these opamps as you can end up making the offset current effects worse than the average input bias current effects.

Here's a link, note page 3 in particular :- http://www.analog.com/media/en/training-seminars/tutorials/MT-038.pdf

Regards

[Zero999]

Saludos!

I've been doing some projects with a TL081 op-amp, as these are quite sensitive to errors I have a good track about theoretical real values like the offset voltage and the input bias currents. However after taking a closer look at the datasheet I've noticed an additional paramenter "Input offset current", at first sight I though "well, it is probably the offset voltage divided by the input impedance since it is so small" but I am not sure about this. I've reaserched on the forum and on the internet but I don't find any clarification on the matter. I would be very thankful if anyone could explain me what is it.

Thank you for your time,
Alex.

Why are you using the TL081?

Do you have very high input impedances?

Unless the impedances imbalance at the inputs are over 10M, or the IC is very hot, the voltage offset will be much greater than the offset due to the bias currents, even if the offset current is ignored.

Worst case figures  for the TL081 @25^oC:
V_OFFSET = 15mV = 15×10^-3
I_BIAS = 400pA = 400×10^-12

Source: data sheet
http://www.ti.com/lit/ds/symlink/tl084.pdf

Calculate the input impedance imbalance would be required to create a voltage difference of 15mV
R = V_OFFSET/I_BIAS = (15×10^-3)/(400×10^-12) = 37.5×10⁶ = 37.5MOhms

If you're having problems with the offset, it's most likely because, being a JFET amplifier, the TL081 has a poor input offset voltage specification. Try changing to the OP07.

[alex.martinez]

Maybe this will help:

http://www.ecircuitcenter.com/Circuits/op_ibias/op_ibias.htm

Read the article, thank you a lot! So Ios = Ib+ - Ib-, yeah I studied in the degree that these bias currents are different, but always neglected their effect, as they are usually of the same order of magnitude. I'll try to play with the values later ahead.

The param :- Average input bias current ~ This is the small current that the Op Amp sinks/sources from it's input pins. It is defined as (I non inv + I inv) / 2 .


Due to this if you feed the Op's inputs from very different impedances you will create an unwanted offset voltage when this bias current flows through these different impedances. So try to keep the input impedance of the input circuitry the same on both inputs and the offset voltages will tend to cancel out.


Bias Input Offset current:- is the difference in bias current between the input pins. Now a lot of newer op-amps (like 0p07 op27 series) are designed with input bias current cancellation. For these parts the input bias current is a very low and temp stable  and the input bias offset current in these devices is nearly equil in size to the input bias current (thats how you can tell if Op is using internal  bias cancelation) . When these two params are nearly equal in magnitude you should not use impedance equalizing resistors in these opamps as you can end up making the offset current effects worse than the average input bias current effects.

Here's a link, note page 3 in particular :- http://www.analog.com/media/en/training-seminars/tutorials/MT-038.pdf

Regards

What do you mean by input impedances? As far as I've been taught the chip has a given input impedance which is increased by the closed loop gain. So those input pins have actually different impedances?

Saludos!

I've been doing some projects with a TL081 op-amp, as these are quite sensitive to errors I have a good track about theoretical real values like the offset voltage and the input bias currents. However after taking a closer look at the datasheet I've noticed an additional paramenter "Input offset current", at first sight I though "well, it is probably the offset voltage divided by the input impedance since it is so small" but I am not sure about this. I've reaserched on the forum and on the internet but I don't find any clarification on the matter. I would be very thankful if anyone could explain me what is it.

Thank you for your time,
Alex.

Why are you using the TL081?

Do you have very high input impedances?

Unless the impedances imbalance at the inputs are over 10M, or the IC is very hot, the voltage offset will be much greater than the offset due to the bias currents, even if the offset current is ignored.

Worst case figures  for the TL081 @25^oC:
V_OFFSET = 15mV = 15×10^-3
I_BIAS = 400pA = 400×10^-12

Source: data sheet
http://www.ti.com/lit/ds/symlink/tl084.pdf

Calculate the input impedance imbalance would be required to create a voltage difference of 15mV
R = V_OFFSET/I_BIAS = (15×10^-3)/(400×10^-12) = 37.5×10⁶ = 37.5MOhms

If you're having problems with the offset, it's most likely because, being a JFET amplifier, the TL081 has a poor input offset voltage specification. Try changing to the OP07.

Well, the TL081 is cheap here (and ine of the few Op-amps I can get with ease), actually the offset voltage is of no concern to me(SW and GBW are the main parameters I take into account), I'm just interested in the AC part of the signal (I just plug a coupling cap), but I was curious how that might affect the output, it is nice to know what would happen to the design at any stage and frequency.
As I have understood that would be the imbalance between the inverting input and non-inverting input impedaces, isn't it?

Thank you for your replies!

[Kevin.D]

What do you mean by input impedances? As far as I've been taught the chip has a given input impedance which is increased by the closed loop gain. So those input pins have actually different impedances?

External impedance's , what you see when looking out from the op's input's .

[Zero999]

Well, the TL081 is cheap here (and ine of the few Op-amps I can get with ease), actually the offset voltage is of no concern to me(SW and GBW are the main parameters I take into account), I'm just interested in the AC part of the signal (I just plug a coupling cap), but I was curious how that might affect the output, it is nice to know what would happen to the design at any stage and frequency.
As I have understood that would be the imbalance between the inverting input and non-inverting input impedaces, isn't it?

With high input impedances, at AC, the input capacitances of the op-amp contribute to it, especially with a JFET op-amp but I couldn't find a specification for the TL081's input capacitance.

What are you trying to do? Please post a schematic.

[suicidaleggroll]

So I guess the best way to mitigate this effect is by accounting for it together with the bias current? I use a resistor network on the non-inverting input, so I guess I just should re-calculate the values and account for that input error.

This statement is a little confusing, so my comment is just for clarification.

The input bias current and input offset currents listed in the datasheet are average/max of the absolute value of that parameter using a large sample size of parts.  When the datasheet says the bias current is "1 pA", it doesn't mean it's absolutely +1 pA, it means it could be anywhere between -1 pA to +1 pA.  You can't pre-calculate resistor values to compensate for it.  You CAN buy the op-amp, measure the bias current for that exact unit, then design a compensation circuit for it, but that compensation circuit would only be applicable to that exact unit.  As soon as you build a second board, you'll have to re-calculate all of the values, otherwise your "compensation" could actually make things worse if that unit has a bias current in the opposite direction.

Same goes for offset current, offset voltage, etc.  Also the bias current, offset current, and offset voltage all change as a function of temperature, they are not fixed.

[alex.martinez]

What do you mean by input impedances? As far as I've been taught the chip has a given input impedance which is increased by the closed loop gain. So those input pins have actually different impedances?

External impedance's , what you see when looking out from the op's input's .

Okay, got it! Thank you all very much ! ^^

[Zero999]

When the datasheet says the bias current is "1 pA", it doesn't mean it's absolutely +1 pA, it means it could be anywhere between -1 pA to +1 pA.

One important thing to note is the polarity of the bias current depends the op-amp's input stage. If it has bias compensation or a rail to rail input, then it can be either positive or negative, otherwise it will always be either positive or negative. An op-amp with an N-channel JFET or NPN BJT input stage will always sink current, where as one with a P-channel or PNP input stage will always source current.

[danadak]

From one of the experts in the industry, page 2 or 3 has a clickable link page for bias current
and other anomalies one has to deal with.

https://www.ti.com/ww/en/bobpease/assets/www-national-com_rap.pdf


Regards, Dana.

[bson]

So I guess the best way to mitigate this effect is by accounting for it together with the bias current? I use a resistor network on the non-inverting input, so I guess I just should re-calculate the values and account for that input error.

It's more something you can use for monte carlo analysis to account for unit variance, to determine the resulting variance of your assembled circuit.  Conversely, it's also something you can determine an upper bound for as a parts requirement.