OK, this is easy. If you look at the curves at the point where the signal at the base maxes and VC is at minimum, you will see that it is still over 3 volts higher than VE. Since VCEsat is typically about 2 volts or thereabouts, it means that the transistor is_not_ in saturation and there is no reason why the waveform should be distorted. But increase the signal level just a little and you will see it going into saturation and then the bottom will be flattened of course.
Don't be confused by the relative voltages between base and collector, they don't define saturation in themselves. The indication of achieving saturation is the VCE reaching the component specific minimum possible value. It doesn't happen (quite yet) in this circuit.
thank you Kremmen, i got your point!
you are saying having base-collector forward biased is merely a necessary conditon for saturation, but not a sufficient one. every book i read talks about the three operating modes, and all emphasis is on the "base-collector forward biased" condition. Vce is played down, and only mentiioned as an "oh by the way".
anyways, following your suggestion, i tried it out again with a 5V input signal.
it clipped like crasy
. 5V, just to get the whole collector curve in the picture.
in this picture, the transistor climbed out of saturation when the signal decreased to below Vc and. it went into saturation when the signal increased to above Vc, but then saturation will not necessarily happen, only when the signal kept increasing to where Vc would decrease to where Vce~=0.2V, will saturation be realized. so the saturation determining condition is really just Vce~=0.2V, and the base-collector forward biased condition is only getting the transistor heading that way with no guarantee of saturation. did i get it right this time?
now, there is no abrupt transistion from normal operating mode to saturation mode, correct? if so, the two edges in this picture should still be part of the output sine wave, instead of abrupt theoretical straight vertical lines, correct?
also, the bottome edge of the output wave form has an upward bulging to it. it is in phase with the signal, so it can't the transistor is still trying to amplify. why the bulge, the transistor is in saturation there, it shouldn't have any response to the signal, what is it doing there?