Is it a good practice to turn off a MOSFET with negative gate voltage?

[hkBattousai]

I was driving a MOSFET in my project with 0V...12V gate voltage levels. Then I remembered that there was also a -5V source available in my circuit. There goes my question; does it make a performance difference (less switching losses) if I drive the MOSFET with -5V...+12V driving voltages instead of 0V...12V levels?

[nuno]

Hummm, I don't think it will make any relevant switching losses difference at the FET, because it will take the same time to turn ON/OFF as before (I'm considering turn ON/OFF time as the time it takes to change current and voltage which is when the FET has the core of switching losses and not the time it takes to take G-S from Von to Voff and vice-versa). It will keep the FET OFF harder (will be more immune to fast drain voltage raise) and have more latency turning ON (will take more time since the driver is commanded to turn ON to the point the FET turns ON, as there are more charge to remove from G-S), the driver will work a little harder (more charge to give/take), ...

[T3sl4co1l]

Not usually.

Definitely helps for "logic level" types -- they're just normal FETs with Vgs(th) shifted down a bit, so driving one from 0...5V is much like driving a regular FET with 2...7V.  More voltage swing means more current through internal resistances, and less time spent in the transition region.

SiC MOSFETs are typically suggested to drive something like -2 to 20V.  SiC has lower gain than Si, hence the higher swing.

It is very useful for IGBTs, rarely specified on the datasheet but often required for reliable operation.  Typically, +10 to +15V is used to turn on, and -5 to -10V to turn off.  Very large modules are often driven with +/-15V.

Tim

[krish2487]

What teslacoil said.

It is a common practice in medium to high power levels to use a negative voltage to turn off the power device (mostly FETs and IGBTS).

This is due to avoid a spurious turn with a unipolar supply, and more importantly to avoid the miller effect due to the parasitic gate-drain capacitance.
The miller capacitance and the input capacitance form a  voltage divider wrt the voltage across the drain-source voltage. If you use a unipolar supply, you ll mostly end up biasing the FET in it linear region and cause it to get hot and blow (in extreme cases). If you use a  bipolar supply, you are likely to avoid the unwanted turn on since the gate will be likely below the threshold even after the voltage divider.

[diegoterc3]

You can always use drivers:

IR2110 for example allows you to use 0V or -5V reference with a logic standard 0-5V logic supply. Take a look it may help you.