Is there any reason to not use bypass caps?

[lilmantis]

Hello guys,

I have seen a low power design that has no bypass cap for EEPROM. The PCB is a 2 layer design.
I have looked on the internet for any cases that might not recommend bypass caps but i have not found anything, If you have some insight on the subject please help a noob.

Thanks.

[lilmantis]

Can someone suggest a good low power circuit design book?

[mikeselectricstuff]

Ignorance, usually!

[TNb]

well, it could work without bypass cap, how well/long is another topic, but maybe some Chinese cheap devices don't use it because they can save 1 cent on them.

[lilmantis]

It is supplied from a uC, traces are ~1-2 cm long.
I was thinking that since it's low power and the transmission is low speed and probably reliable transmission is not necessary it would be OK maybe. But I have seen no datasheet/app note that would hint toward this.

[mikeselectricstuff]

In practice you can often get away with surprisingly little decoupling and still have something work. Makes more of a difference if you care about EMC, both radiated emission & susceptibility and ESD tolerance

[abaxas]

Surely, near excessive decoupling is near the top of any design rules?

The cost so low, it's almost free, so why bother not doing it.

[TNb]

Usually in datasheet they advise to use bypass cap and keep traces short, but in these advice they do not specify neither speed nor power(well, maybe some does, I've never seen it). So I would guess it is more like "general rule" and it may be omitted if you don't give a shit about noise and stuff. As for myself I can do stuff without bypass cap on the breadboard for example just because I'm lazy to put it there, but when I make PCB I would put it there anyway, though it may be kinda useless really if all that your device is doing is beeping or something like that.

[Simon]

Hello guys,

I have seen a low power design that has no bypass cap for EEPROM. The PCB is a 2 layer design.
I have looked on the internet for any cases that might not recommend bypass caps but i have not found anything, If you have some insight on the subject please help a noob.

Thanks.

It's good practice to use them and the lack of them can cause many an illusive problem. the few pence that a 100nF ceramic costs makes it a no brainer, although chips that are dealing in a few mA should have a 1-100uF capacitor as well.

[mikeselectricstuff]

A while ago, just for amusement I tried pulling off decoupling caps one by one from a 2-layer FPGA board  running at 25MHz - it was still working fine when all that was left was a single 1u ceramic on each supply rail.

[timb]

A while ago, just for amusement I tried pulling off decoupling caps one by one from a 2-layer FPGA board  running at 25MHz - it was still working fine when all that was left was a single 1u ceramic on each supply rail.

Actually, that would be a great idea for a video or article or something. Get a high speed digital circuit, hook a scope up to critical signal paths and start pulling caps off. Show the progression.


Sent from my Smartphone

[mikeselectricstuff]

PC motherboard Jenga!

[Artraze]

Cost is the usual reason, but keep in mind that cost isn't just the <1 cent cap.  It's also the board space for the footprint + routing, time for pick and place, additional solder, etc.  A quick estimate for my protoboards says 1-2 cents for board space and >25cents in wages (which may or may not matter).  I still over-bypass, though, but that's because the extra couple minutes soldering and 10cents is worth not having to make another run of boards, but if you're making thousands?  Maybe not.

In this particular case, I think the reason is different.  If the EEPROM is powered by a uC, then a bypass capacitor could actually be dangerous as the inrush current might damage the I/O pin.  A series resistor could fix that, but that adds its own problems and a second component.

I addition, I'm guessing the EEPROM is I2C.  I2C chips can be good candidates for dropping bypass because the frequency is (usually) low and the outputs are open collector.  The open collector drive means that they don't actually supply current, just sink it to ground (which can bounce up but is usually a low impedance ground plane).

[tszaboo]

If you periodically power up and down a power rail to save energy, less the bypassing, less the wake up time and the inrush current is. And you dont want any of those if you operate from a tiny battery. EEPROMs usually working fine down to 1,7V, high level is like 0,8V and communication speed is almost DC.

[T3sl4co1l]

Bypassing is usually overspecified because the underlying problem is severely under-analyzed.  Not only do designers rarely if ever determine the impedance of supply rails at every point of use, but manufacturers probably don't even have a clue how low the impedance should (or shouldn't!) be, or even if they do, it's never listed in the datasheet.

Using multiple caps will always make things better on average, but can make things worse at certain frequencies.  If you have two somewhat distant loads on a supply rail, each bypassed locally, and the supply is routed as a long trace (maybe a trace over and within a stitched ground plane, in typical 2-layer construction), then you will get an LC series resonance between the two, the capacitance being the two in series, and the inductance being the loop made by the trace over ground.  With ceramic caps, the Q is enough to disturb things.

A single central cap might be preferable, as long as the traces aren't too long for the operating frequencies and harmonics at each load.

There are some reasons to use little bypass: if the supply voltage must be quickly variable (why, I don't really know, but there are some parasitic-power sorts of applications where it may come in handy), you can't tolerate much capacitance, because it will load the source.  Such circuits probably don't need much bypass anyway, because they are full of current sources (consider the circuitry inside a TL431, or an op-amp, etc., and the things they do to achieve a wide supply range with consistent characteristics).

Or, if the circuit must shut down instantly upon losing power.  Or if it's low power, it may not need much at all.

Other reasons you might still want bypass caps: ESD and surges, for one -- without capacitance, these transients must be absorbed by a TVS, or worse, avalanche in whatever components give way first.

A battery powered application probably won't benefit from electrolytic caps (which also means it won't have much intrinsic resistance to surges, sans TVS), but a line or SMPS powered device probably will need them.

Of course, at high power, the impedances get lower, and you'll need electrolytics again, so if you were hoping to get away without electrolytics in your next electric vehicle project, think again.

Tim

[DanielS]

The amount of bypassing you need depends on how fast the signal edges you want to accommodate are and how much noise your design can tolerate.

For things like mobile SoCs where power-efficiency is a priority and use dynamic core power to reduce power, you want to use the least amount of capacitance you can get away with to avoid wasting power (dis)charging the extra decoupling when changing power levels - modern SoCs run at anywhere from 0.8V to 1.2V depending on how many cores are active and their operating frequency so if you whack an extra 10µF worth of capacitors on Vcore, each transition from low-power to full-power costs you an extra 4µJ worth of energy. If you have 1000 power state transitions per second, that turns into 4mJ/s, which is 4mW wasted... that's just over 1mA of extra drain on a single-cell lithium battery.

[T3sl4co1l]

Transitions aren't necessarily loss; an ideal synchronous converter will not dissipate anything, it just feeds back into the primary supply.

Tim

[Bassman59]

A while ago, just for amusement I tried pulling off decoupling caps one by one from a 2-layer FPGA board  running at 25MHz - it was still working fine when all that was left was a single 1u ceramic on each supply rail.

Congratulations, you're (re-)invented Muntzing!

[EEVblog]

Actually, that would be a great idea for a video or article or something. Get a high speed digital circuit, hook a scope up to critical signal paths and start pulling caps off. Show the progression.

That one's has been sitting on my to-do list for an embarrassing long time!
But then it's not really complete without then doing a detailed tutorial of how and why. Don't want anyone to get the impression that decoupling caps are BS.

[EEVblog]

In theory (and sometimes practice) it is possible that adding bypass caps is bad thing that can make matters worse, if you hit upon a resonant point with the inductive traces.

[VK5RC]

I suspect a lot of products will work 'fine'  until placed in a ' hostile' but known environment,  RF power transmitters are a good circuit design acid test.
A faulty transmission line,  antenna with a bad swr often produces a series of weird results usually in your cheaper gear!

[ludzinc]

About 15 years ago I was bought into a company that had a myriad of problems with their products in the field.

Looking at their HC05 based boards I could see:

o  Really crap power distribution - no ground planes, long spidery traces, lots and lots of looping traces. 
o  Little to no decoupling on the boards.  A 100nF on the 7805 output was about it for boards running dual processors.  OMG.

My first action was to fit decoupling caps to products in the field and then see what happened.  And that alone fixed 90% of the issues. 

I spent weeks travelling the country soldering in 100nF caps....

[timb]

In theory (and sometimes practice) it is possible that adding bypass caps is bad thing that can make matters worse, if you hit upon a resonant point with the inductive traces.

The other issue comes with *specific size* SMD caps. For example, a lot of 1206 ceramic caps have a resonant frequency in the low 1MHz range; the closer you get to the specific resonant frequency the worse the cap performs (capacitance, ESR and voltage values can all change very drastically). So if your SMPS controller happens to run at 1.2MHz, that 1uF cap you’re speccing in might be closer to 10nF!

[Rufus]

The other issue comes with *specific size* SMD caps. For example, a lot of 1206 ceramic caps have a resonant frequency in the low 1MHz range; the closer you get to the specific resonant frequency the worse the cap performs (capacitance, ESR and voltage values can all change very drastically).

But that is series resonance so for decoupling it is actually the best the capacitor can get. Above resonance it looks more like an inductor than capacitor but it still blocks DC and is still a low impedance. The typical self inductance of a 1206 ceramic is 1.2 nH and that is only 75m ohms at 10MHz.

[miguelvp]

Doesn't this has to do more with your voltage regulation?

If you can hit the core voltage then do you need bypass caps?

[Dago]

Doesn't this has to do more with your voltage regulation?

If you can hit the core voltage then do you need bypass caps?

Not really no. With fast transients (such as caused by lets say digital edge transitions which can have a bandwidth of up to several GHz) the decoupling cap supplies all the energy because the inductance to the regulator is humongous. Switching regulators usually have a bandwidth of a few MHz.