JFET rds-on and noise

[fonograph]

Generaly speaking,do JFETs with lower on resistance have lower 1/f noise corner freqency? I read somewhere that small transistors with higher on resistance have higher 1/f noise while big transistors with lower on resistance have lower 1/f noise,is that true?

[Zero999]

It makes sense. Generally, larger transistors are less noisy because they're roughly equivalent to many small transistors connected in parallel, which also reduces the noise.

Noise sources are uncorrelated waveforms, so adding noise sources together doesn't generate double the noise voltage, as only the parts in phase add, the other parts will be anti-phase so will subtract. If you take a signal, put it through two amplifiers, each adding equal noise to the system, then take the average output of both of the amplifiers, the result will be less noisy, than if you'd only used one amplifier.

Here's a link what Linear Technology say on the matter:
http://www.linear.com/solutions/5657

[David Hess]

The broadband noise roughly depends on the channel resistance so lower channel resistance actually *increases* the 1/f corner but this does not reflect higher 1/f noise; it just means that the corner frequency where the 1/f noise and white noise are equal moved up in frequency.

So the 1/f noise is only related to channel resistance in the sense that larger transistors have lower 1/f noise and also have lower channel resistance.  Geometry  and process purity determine 1/f noise; high W/L ratio and high area yield lower 1/f noise.

[danadak]

I looked at a number of papers, seems consensus is 1/f strongly dependent
on process. The defining equations seem to indicate Noise 1/f strongly dependent
on 1/L², W not a factor. So longer channel = lower 1/f, but rapidly
diminishing returns.

Rdson strongly dependent on W / L. Longer the channel, yields lower Rdson.

Jumping off edge of cliff looks like lower Rdson has lower 1/f.

Corner f also proportional to 1/L².

Maybe an expert can bail me out here......


http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee240_s09/lectures/Lecture05_Electronic_Noise_6up.pdf


http://www.silvaco.com/content/kbase/noise_modeling.pdf



Regards, Dana.

[rfeecs]

Those references refer to MOSFETs.  JFET is a different animal.

Here's one for JFET:
https://www.fairchildsemi.com/application-notes/AN/AN-6602.pdf

The third basic noise source confronting designers is flicker
or "1/f" noise whose density is roughly inversely
proportional to frequency starting at about 1 kHz in both
JFETs and bipolar transistors and increasing as frequency is
decreased. Through careful processing, flicker noise in
JFETs has been reduced to levels nearly insignificant to the
designer.

[David Hess]

Those references refer to MOSFETs.  JFET is a different animal.

As far as I know, the mechanism for 1/f noise in MOSFETs and JFETs is the same, charge trapping in the gate which shifts the gate threshold voltage.  In MOSFETs the charge gets trapped in the gate dielectric and I guess in JFETs it gets trapped in the depletion zone formed in the gate's PN junction.

Probably not coincidentally MOSFET and JFET gate threshold voltages are not as stable as bipolar transistor Vbe while the former have higher 1/f noise and the later has lower 1/f noise and the same pattern appears comparing MOSFETs to JFETs.

Rdson strongly dependent on W / L. Longer the channel, yields lower Rdson.

Um, isn't this backwards?  The channel *current* is proportional to W/L so a longer L yields a higher resistance.

[rfeecs]

Those references refer to MOSFETs.  JFET is a different animal.

As far as I know, the mechanism for 1/f noise in MOSFETs and JFETs is the same, charge trapping in the gate which shifts the gate threshold voltage.  In MOSFETs the charge gets trapped in the gate dielectric and I guess in JFETs it gets trapped in the depletion zone formed in the gate's PN junction.

Sounds like two different animals to me.

It depends on whether the noise is from the surface or the bulk.  The JFET depletion region is nice high quality bulk material without many traps.

A few more references:
http://www.eng.auburn.edu/~wilambm/pap/2011/K10147_C011.pdf

There are two
major models of 1/f noise:
• Surface model developed by McWhorter in 1957 [7]
• Bulk model developed by Hooge in 1969 [8]
The simplest way to obtain 1/f characteristics is to superpose many different spectra of generationrecombination
noise, where free carriers are randomly trapped and released by centers with different
life times. This was the basic concept behind the McWhorter model where it was assumed that
• In the silicon oxide near the silicon surface there are uniformly distributed trap centers.
• The probability of the carrier penetration to trap centers is decreasing exponentially with the
distance from the surface.
• Time constants of trap centers increases with the distance from the surface.
• Trapping mechanisms by separate centers are independent.

http://pessina.mib.infn.it/WOLTE2014/van%20der%20ziel/1.90201.pdf

From the fact that good silicon JFET's do not have any flicker noise. it is concluded that flicker noise in
semiconductors and semiconductor devices cannot be a true bulk effect. Since JFET's have no
semiconductor-oxide interface to speak of. whereas all other semiconductor devices do. this points to the
semiconductor-oxide interface as the source of 1/ f noise.