Seeking ideas for clock setup

[bitman]

I've run out of ideas and looking to see if someone has ideas on how to do this.  I've got a TTL only setup of how a CPU works, and I need to be able to generate clock pulses manually. Initially I thought a single pulse would be all I needed, but I've found I need 3 overlapping pulses. A simple 74ls93 allows me to generate the 3 overlapping pulses (staggered) just fine, from a clock (any divide by .... counter does this perfectly). But I also want to be able to trigger these pulses manually in two different ways:

1) A single push generates a full set of pulses at the clock speed
2) A single push generates just one pulse, subsequent pushes generates additional pulses.  So far everything is triggered on the rising edge so I can keep the pulses up high while waiting for the next trigger.

I've created #1 using a 556 and the 74ls93 + a few AND gates. It disables the 555 when the cycle is over (working on a diagram of this). But I'm not sure how to do the single pulse. The challenge is that it takes multiple clock pulses to generate the individual signals. The number of pulses is different depending on the phase.

Initially I thought I could simply manipulate the 74ls94 from 3 different sources. But I'm struggling with how to do that on example #2.   So I'm looking for ideas, suggestions etc.

EDIT: Added diagram of solution 1

[rstofer]

Were I building this, I would probably go for some kind of 8 pin uC.  All I would need is 1 input and 3 outputs plus another input to select mode.  Total 5 IO pins.   Or, I could use two pins for mode and wind up with 4 different modes.

The Atmel ATtiny25 has 6 IO lines.

I imagine the project doesn't want to include a uC.  Well, I would just use it anyway and scrub off the ID.

There's actually a way to use a standard Arduino to program the ATtiny25:

https://create.arduino.cc/projecthub/arjun/programming-attiny85-with-arduino-uno-afb829

I think you could come up with a one chip solution.  All of the code could be written using the Arduino IDE.

[David Hess]

I would use a 3-bit Johnson counter to generate the 3-phase clock and decode the output to generate a single cycle.  Not counting the decoding logic for a single cycle, this requires 3 D-type flip-flops and a gate.

https://www.allaboutcircuits.com/textbook/digital/chpt-12/ring-counters/

[bitman]

I could solve a lot of challenges by just adding little atmel micro controllers all over the place. But that would defeat the purpose of showing core principles in electronics design for computers. This board breaks down all primary components of a CPU as they were designed in the late 70ies (8008 etc) and is an attempt to demystify how computers work. While my CS degree certainly covered basic gates it was not very deep in the electronics "how does it work" - so this all started with me wanting to put that knowledge into a practical use, and going "wow I don't know anything" having to catch up.

I cannot tell you how many times I went "I can just code that - it's like 10 lines of C or even ASM" but it's TTL/CMOS all the way. The only exception so far is the EPROM I use for the micro-code - that was from a simple space consideration I had to make a compromise.

[bitman]

I would use a 3-bit Johnson counter to generate the 3-phase clock and decode the output to generate a single cycle.  Not counting the decoding logic for a single cycle, this requires 3 D-type flip-flops and a gate.

https://www.allaboutcircuits.com/textbook/digital/chpt-12/ring-counters/

That's pretty much what I did instead I used a simple binary counter to get the same output.  If you look at my design, you'll notice that I don't start showing the pulses until Q3 goes high - I'm thinking of reversing that, which means each two pulses will change the state. I like your idea of making that into a single pulse.

But in the end, I still need to come up with a method of dynamically selecting if I'm generating the next phase or a full phase of clocks when manually generating a step.  With the Johnson counter (4017) how would you suggest doing this?

[David Hess]

But in the end, I still need to come up with a method of dynamically selecting if I'm generating the next phase or a full phase of clocks when manually generating a step.  With the Johnson counter (4017) how would you suggest doing this?

That makes things difficult.  The easiest way is probably to count cycles of the input clock.

[Ian.M]

You could use a decoded counter, and OR the outputs together to get the desired   clock phases, and also to get a signal that specifies when to stop the clock.   Add a  switch to select between stop after all phases (output of stop OR gate), stop after complete cycle (wired to last active output of counter) or free run.  Some attention may be needed to deglitching e.g. worst case you may need to run the phases through D type fliflops triggered on the opposite master clock edge to the counter increment.